EP0926260A3 - Verwendung der Antikörper - Antigen Wechselwirkung zur Herstellung eines Metallfilmmusters - Google Patents
Verwendung der Antikörper - Antigen Wechselwirkung zur Herstellung eines Metallfilmmusters Download PDFInfo
- Publication number
- EP0926260A3 EP0926260A3 EP98123279A EP98123279A EP0926260A3 EP 0926260 A3 EP0926260 A3 EP 0926260A3 EP 98123279 A EP98123279 A EP 98123279A EP 98123279 A EP98123279 A EP 98123279A EP 0926260 A3 EP0926260 A3 EP 0926260A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- rat igg
- igg antibody
- substrate
- antibody film
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 230000009830 antibody antigen interaction Effects 0.000 title 1
- 230000015572 biosynthetic process Effects 0.000 title 1
- 239000002184 metal Substances 0.000 title 1
- 239000000427 antigen Substances 0.000 abstract 4
- 102000036639 antigens Human genes 0.000 abstract 4
- 108091007433 antigens Proteins 0.000 abstract 4
- 239000000758 substrate Substances 0.000 abstract 4
- 239000010419 fine particle Substances 0.000 abstract 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract 1
- 229910052760 oxygen Inorganic materials 0.000 abstract 1
- 239000001301 oxygen Substances 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0009—RRAM elements whose operation depends upon chemical change
- G11C13/0014—RRAM elements whose operation depends upon chemical change comprising cells based on organic memory material
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5664—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using organic memory material storage elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5671—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge trapping in an insulator
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0009—RRAM elements whose operation depends upon chemical change
- G11C13/0014—RRAM elements whose operation depends upon chemical change comprising cells based on organic memory material
- G11C13/0019—RRAM elements whose operation depends upon chemical change comprising cells based on organic memory material comprising bio-molecules
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
- G11C2216/02—Structural aspects of erasable programmable read-only memories
- G11C2216/08—Nonvolatile memory wherein data storage is accomplished by storing relatively few electrons in the storage layer, i.e. single electron memory
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/962—Quantum dots and lines
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP34238697 | 1997-12-12 | ||
JP34238697 | 1997-12-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0926260A2 EP0926260A2 (de) | 1999-06-30 |
EP0926260A3 true EP0926260A3 (de) | 2001-04-11 |
Family
ID=18353333
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP98123279A Withdrawn EP0926260A3 (de) | 1997-12-12 | 1998-12-07 | Verwendung der Antikörper - Antigen Wechselwirkung zur Herstellung eines Metallfilmmusters |
Country Status (3)
Country | Link |
---|---|
US (2) | US6303516B1 (de) |
EP (1) | EP0926260A3 (de) |
KR (1) | KR100347624B1 (de) |
Families Citing this family (52)
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US6713309B1 (en) | 1999-07-30 | 2004-03-30 | Large Scale Proteomics Corporation | Microarrays and their manufacture |
US6653151B2 (en) | 1999-07-30 | 2003-11-25 | Large Scale Proteomics Corporation | Dry deposition of materials for microarrays using matrix displacement |
WO2001068513A1 (fr) | 2000-03-16 | 2001-09-20 | Matsushita Electric Industrial Co., Ltd. | Procede destine a usiner une microstructure avec precision |
US6400610B1 (en) * | 2000-07-05 | 2002-06-04 | Motorola, Inc. | Memory device including isolated storage elements that utilize hole conduction and method therefor |
WO2002103753A2 (en) * | 2000-11-01 | 2002-12-27 | Myrick James J | Nanoelectronic interconnection and addressing |
US6534782B1 (en) | 2000-11-22 | 2003-03-18 | Battelle Memorial Institute | Structure having spatially separated photo-excitable electron-hole pairs and method of manufacturing same |
KR100597014B1 (ko) * | 2001-01-10 | 2006-07-06 | 재단법인서울대학교산학협력재단 | 물질의 결정 구조를 이용한 패턴 형성 방법 및 그 구조를갖는 기능성 소자 |
KR100455282B1 (ko) * | 2001-01-11 | 2004-11-08 | 삼성전자주식회사 | 램 및 롬 기능을 갖는 단일 트랜지스터를 포함하는 메모리소자와 그 동작 및 제조방법 |
TW569195B (en) * | 2001-01-24 | 2004-01-01 | Matsushita Electric Ind Co Ltd | Micro-particle arranged body, its manufacturing method, and device using the same |
KR100462055B1 (ko) * | 2001-04-03 | 2004-12-17 | 재단법인서울대학교산학협력재단 | 물질의 결정구조를 이용한 패턴 형성 방법 및 장치 |
EP1262489A1 (de) * | 2001-05-14 | 2002-12-04 | Matsushita Electric Industrial Co., Ltd. | Komplex aus rekombinantem Ferritin und einem Edelmetall sowie dieses Ferritin kodierende DNA |
KR20020091982A (ko) * | 2001-06-01 | 2002-12-11 | 삼성전자 주식회사 | 얕은 트렌치 소자분리 구조를 가지는 비휘발성 메모리소자 및 그 제조방법 |
EP1278234B1 (de) * | 2001-07-19 | 2012-01-11 | STMicroelectronics Srl | MOS Transistor und Verfahren zu dessen Herstellung |
JP2003068891A (ja) * | 2001-08-24 | 2003-03-07 | Hitachi Ltd | 半導体記憶素子、半導体装置及びその制御方法 |
US7985590B2 (en) * | 2002-09-26 | 2011-07-26 | Science Application International Corporation | Method and system for detection using nanodot taggants |
US7035308B1 (en) | 2002-10-28 | 2006-04-25 | Science Applications International Corporation | Method and system for countering laser technology |
US7022571B2 (en) * | 2003-05-01 | 2006-04-04 | United Microelectronics Corp. | Quantum structure and forming method of the same |
JP2004349341A (ja) * | 2003-05-20 | 2004-12-09 | Sharp Corp | 半導体記憶素子、半導体装置およびそれらの製造方法、携帯電子機器並びにicカード |
DE10326805B4 (de) * | 2003-06-13 | 2007-02-15 | Infineon Technologies Ag | Herstellungsverfahren für nichtflüchtige Speicherzellen |
US6927136B2 (en) * | 2003-08-25 | 2005-08-09 | Macronix International Co., Ltd. | Non-volatile memory cell having metal nano-particles for trapping charges and fabrication thereof |
US7255912B2 (en) | 2003-09-23 | 2007-08-14 | Eastman Kodak Company | Antistatic conductive grid pattern with integral logo |
US7083885B2 (en) | 2003-09-23 | 2006-08-01 | Eastman Kodak Company | Transparent invisible conductive grid |
US7153620B2 (en) | 2003-09-23 | 2006-12-26 | Eastman Kodak Company | Transparent invisible conductive grid |
US7253104B2 (en) * | 2003-12-01 | 2007-08-07 | Micron Technology, Inc. | Methods of forming particle-containing materials |
JP2005251990A (ja) * | 2004-03-04 | 2005-09-15 | Nec Electronics Corp | 不揮発性半導体記憶装置 |
JP3822229B2 (ja) | 2004-05-27 | 2006-09-13 | 松下電器産業株式会社 | 基板上への微粒子配列体の形成方法 |
US7335556B2 (en) * | 2004-06-14 | 2008-02-26 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
WO2006064640A1 (ja) * | 2004-12-14 | 2006-06-22 | Matsushita Electric Industrial Co., Ltd. | フェリチンの選択的配置方法 |
JP4585523B2 (ja) * | 2004-12-28 | 2010-11-24 | 独立行政法人科学技術振興機構 | 自己組織化材料または微粒子を基板上に固定化する方法、および当該方法を用いて作製した基板 |
KR100647318B1 (ko) * | 2005-02-03 | 2006-11-23 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 제조방법 |
KR100668330B1 (ko) * | 2005-02-21 | 2007-01-12 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 제조방법 |
JP5238994B2 (ja) * | 2005-04-11 | 2013-07-17 | 国立大学法人 奈良先端科学技術大学院大学 | 薄膜トランジスタ及びその製造方法 |
WO2006125825A2 (en) * | 2005-05-27 | 2006-11-30 | The Provost Fellows And Scholars Of The College Of The Holy And Undivided Trinity Of Queen Elizabeth Near Dublin | Method of forming conducting nanowires |
US7368370B2 (en) * | 2005-06-15 | 2008-05-06 | The University Of Connecticut | Site-specific nanoparticle self-assembly |
CN100423213C (zh) * | 2005-08-05 | 2008-10-01 | 旺宏电子股份有限公司 | 非易失性存储器的操作方法 |
KR100683854B1 (ko) * | 2005-09-06 | 2007-02-15 | 삼성전자주식회사 | 비휘발성 기억 소자의 형성 방법 |
US20070118861A1 (en) * | 2005-11-21 | 2007-05-24 | General Instrument Corporation | System and method for delivering graphics received through a cable television system to a digital television |
JP2007158176A (ja) * | 2005-12-07 | 2007-06-21 | Hitachi Ltd | 半導体記憶装置およびその製造方法 |
WO2007091364A1 (ja) * | 2006-02-06 | 2007-08-16 | Matsushita Electric Industrial Co., Ltd. | 単電子半導体素子の製造方法 |
KR100884240B1 (ko) * | 2006-10-20 | 2009-02-17 | 삼성전자주식회사 | 반도체 소자 및 그 형성 방법 |
KR100858085B1 (ko) * | 2006-12-18 | 2008-09-10 | 삼성전자주식회사 | 나노닷을 전하 트랩 사이트로 이용하는 전하 트랩형 메모리소자 |
US7787304B2 (en) * | 2007-11-01 | 2010-08-31 | Jonker Llc | Method of making integrated circuit embedded with non-volatile one-time-programmable and multiple-time programmable memory |
US7787295B2 (en) * | 2007-11-14 | 2010-08-31 | Jonker Llc | Integrated circuit embedded with non-volatile multiple-time programmable memory having variable coupling |
US7876615B2 (en) * | 2007-11-14 | 2011-01-25 | Jonker Llc | Method of operating integrated circuit embedded with non-volatile programmable memory having variable coupling related application data |
US8580622B2 (en) * | 2007-11-14 | 2013-11-12 | Invensas Corporation | Method of making integrated circuit embedded with non-volatile programmable memory having variable coupling |
US8388851B2 (en) | 2008-01-08 | 2013-03-05 | Micron Technology, Inc. | Capacitor forming methods |
US8305805B2 (en) * | 2008-11-03 | 2012-11-06 | Invensas Corporation | Common drain non-volatile multiple-time programmable memory |
US8203861B2 (en) * | 2008-12-30 | 2012-06-19 | Invensas Corporation | Non-volatile one-time—programmable and multiple-time programmable memory configuration circuit |
JP2011071240A (ja) * | 2009-09-24 | 2011-04-07 | Toshiba Corp | 半導体記憶装置、及びその製造方法 |
US8808558B2 (en) * | 2010-02-04 | 2014-08-19 | National Sun Yat-Sen University | System and method for alignment of nanoparticles on substrate |
US10629752B1 (en) * | 2018-10-11 | 2020-04-21 | Applied Materials, Inc. | Gate all-around device |
DE102020129558A1 (de) | 2020-11-10 | 2022-05-12 | Rheinisch-Westfälische Technische Hochschule (Rwth) Aachen | Bauteil zur Messung elektrischer Ladung |
Citations (16)
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---|---|---|---|---|
US4852062A (en) * | 1987-09-28 | 1989-07-25 | Motorola, Inc. | EPROM device using asymmetrical transistor characteristics |
US4882707A (en) * | 1986-10-27 | 1989-11-21 | Kabushiki Kaisha Toshiba | Non-volatile semi-conductor memory device with double gate structure |
EP0389721A2 (de) * | 1989-03-27 | 1990-10-03 | Ict International Cmos Technology, Inc. | Flash-EPROM-Zelle und Verfahren zu ihrer Herstellung |
EP0489465A2 (de) * | 1990-12-05 | 1992-06-10 | Akzo Nobel N.V. | Bindung von Liganden an Gold |
JPH05121763A (ja) * | 1991-10-30 | 1993-05-18 | Rohm Co Ltd | 半導体記憶装置の製造方法 |
JPH06120481A (ja) * | 1991-05-23 | 1994-04-28 | Canon Inc | 量子箱半導体素子 |
JPH07115142A (ja) * | 1993-10-19 | 1995-05-02 | Matsushita Electric Ind Co Ltd | 不揮発性半導体記憶装置とその製造方法 |
US5459091A (en) * | 1993-10-12 | 1995-10-17 | Goldstar Electron Co., Ltd. | Method for fabricating a non-volatile memory device |
WO1996007487A1 (en) * | 1994-09-10 | 1996-03-14 | The University Of Liverpool | Method of synthesising materials having controlled electronic, magnetic and/or optical properties |
US5519653A (en) * | 1994-03-11 | 1996-05-21 | Thomas; Mammen | Channel accelerated carrier tunneling-(CACT) method for programming memories |
US5591652A (en) * | 1993-11-08 | 1997-01-07 | Sharp Kabushiki Kaisha | Method of manufacturing flash memory with inclined channel region |
EP0763856A1 (de) * | 1995-09-11 | 1997-03-19 | Matsushita Electronics Corporation | Halbleiterspeicheranordnung und Verfahren zur Steuerung |
EP0788149A1 (de) * | 1996-02-05 | 1997-08-06 | Hitachi Europe Limited | Verfahren zum Ablegen von nanometrischen Partikeln |
US5687113A (en) * | 1994-03-30 | 1997-11-11 | Sgs-Thomson Microelectronics S.A. | Electrically programmable memory cell |
JPH10144877A (ja) * | 1996-09-13 | 1998-05-29 | Toshiba Corp | メモリセル |
EP0881691A2 (de) * | 1997-05-30 | 1998-12-02 | Matsushita Electric Industrial Co., Ltd. | Anordnung mit Quanten-Schachteln |
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JPH09213927A (ja) | 1996-02-05 | 1997-08-15 | Toshiba Corp | 微小金属ドットの製造方法および微小金属ドット製造装置 |
JPH10121763A (ja) | 1996-10-22 | 1998-05-12 | Fuji Hensokuki Co Ltd | 格納システム |
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JPH10199813A (ja) * | 1997-01-07 | 1998-07-31 | Mitsubishi Electric Corp | 半導体装置の製造方法および半導体装置 |
US5888885A (en) * | 1997-05-14 | 1999-03-30 | Lucent Technologies Inc. | Method for fabricating three-dimensional quantum dot arrays and resulting products |
-
1998
- 1998-12-07 EP EP98123279A patent/EP0926260A3/de not_active Withdrawn
- 1998-12-10 US US09/208,753 patent/US6303516B1/en not_active Expired - Fee Related
- 1998-12-11 KR KR10-1998-0054331A patent/KR100347624B1/ko not_active IP Right Cessation
-
1999
- 1999-05-27 US US09/320,695 patent/US6342716B1/en not_active Expired - Fee Related
Patent Citations (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4882707A (en) * | 1986-10-27 | 1989-11-21 | Kabushiki Kaisha Toshiba | Non-volatile semi-conductor memory device with double gate structure |
US4852062A (en) * | 1987-09-28 | 1989-07-25 | Motorola, Inc. | EPROM device using asymmetrical transistor characteristics |
EP0389721A2 (de) * | 1989-03-27 | 1990-10-03 | Ict International Cmos Technology, Inc. | Flash-EPROM-Zelle und Verfahren zu ihrer Herstellung |
EP0489465A2 (de) * | 1990-12-05 | 1992-06-10 | Akzo Nobel N.V. | Bindung von Liganden an Gold |
JPH06120481A (ja) * | 1991-05-23 | 1994-04-28 | Canon Inc | 量子箱半導体素子 |
JPH05121763A (ja) * | 1991-10-30 | 1993-05-18 | Rohm Co Ltd | 半導体記憶装置の製造方法 |
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KR100347624B1 (ko) | 2003-01-24 |
US6342716B1 (en) | 2002-01-29 |
KR19990062988A (ko) | 1999-07-26 |
EP0926260A2 (de) | 1999-06-30 |
US6303516B1 (en) | 2001-10-16 |
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