DE69902199D1 - Halbleiteranordnung mit einer Pegelverschiebungsschaltung - Google Patents

Halbleiteranordnung mit einer Pegelverschiebungsschaltung

Info

Publication number
DE69902199D1
DE69902199D1 DE69902199T DE69902199T DE69902199D1 DE 69902199 D1 DE69902199 D1 DE 69902199D1 DE 69902199 T DE69902199 T DE 69902199T DE 69902199 T DE69902199 T DE 69902199T DE 69902199 D1 DE69902199 D1 DE 69902199D1
Authority
DE
Germany
Prior art keywords
shift circuit
level shift
semiconductor arrangement
semiconductor
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69902199T
Other languages
English (en)
Other versions
DE69902199T2 (de
Inventor
Masakazu Amanai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69902199D1 publication Critical patent/DE69902199D1/de
Application granted granted Critical
Publication of DE69902199T2 publication Critical patent/DE69902199T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Logic Circuits (AREA)
  • Read Only Memory (AREA)
DE69902199T 1998-03-24 1999-03-22 Halbleiteranordnung mit einer Pegelverschiebungsschaltung Expired - Fee Related DE69902199T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP07561898A JP3389856B2 (ja) 1998-03-24 1998-03-24 半導体装置

Publications (2)

Publication Number Publication Date
DE69902199D1 true DE69902199D1 (de) 2002-08-29
DE69902199T2 DE69902199T2 (de) 2002-11-21

Family

ID=13581389

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69902199T Expired - Fee Related DE69902199T2 (de) 1998-03-24 1999-03-22 Halbleiteranordnung mit einer Pegelverschiebungsschaltung

Country Status (6)

Country Link
US (1) US6177824B1 (de)
EP (1) EP0945985B1 (de)
JP (1) JP3389856B2 (de)
KR (1) KR100323323B1 (de)
CN (1) CN1229998A (de)
DE (1) DE69902199T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320446B1 (en) * 1999-02-17 2001-11-20 Elbrus International Limited System for improving low voltage CMOS performance
JP2001144603A (ja) * 1999-11-18 2001-05-25 Oki Micro Design Co Ltd レベルシフタ回路およびそれを含むデータ出力回路
JP2001356741A (ja) * 2000-06-14 2001-12-26 Sanyo Electric Co Ltd レベルシフタ及びそれを用いたアクティブマトリクス型表示装置
US6385099B1 (en) * 2001-03-16 2002-05-07 Intel Corpration Reducing level shifter standby power consumption
US6882200B2 (en) 2001-07-23 2005-04-19 Intel Corporation Controlling signal states and leakage current during a sleep mode
GB0121013D0 (en) 2001-08-30 2001-10-24 Micron Technology Inc Combined dynamic logic gate and level shifter and method employing same
JP2003243538A (ja) * 2002-02-12 2003-08-29 Hitachi Ltd 半導体集積回路装置
US6580307B1 (en) * 2002-06-26 2003-06-17 Ememory Technology Inc. Level shift circuit without junction breakdown of transistors
US7339822B2 (en) * 2002-12-06 2008-03-04 Sandisk Corporation Current-limited latch
JP4042627B2 (ja) * 2003-05-20 2008-02-06 ソニー株式会社 電源電圧変換回路およびその制御方法、ならびに表示装置および携帯端末
JP4800781B2 (ja) * 2006-01-31 2011-10-26 セイコーインスツル株式会社 電圧レベルシフト回路、および半導体集積回路
US7358790B2 (en) * 2006-02-17 2008-04-15 Himax Technologies Limited High performance level shift circuit with low input voltage
DE602006016230D1 (de) * 2006-03-17 2010-09-30 St Microelectronics Srl Mit Niederspannungstransistoren implementierter Pegelschieber für eine Halbleiterspeichervorrichtung
US7593259B2 (en) * 2006-09-13 2009-09-22 Mosaid Technologies Incorporated Flash multi-level threshold distribution scheme
US7605633B2 (en) * 2007-03-20 2009-10-20 Kabushiki Kaisha Toshiba Level shift circuit which improved the blake down voltage
US7679418B2 (en) * 2007-04-27 2010-03-16 Mosaid Technologies Incorporated Voltage level shifter and buffer using same
EP2179507A1 (de) 2007-08-13 2010-04-28 Nxp B.V. Pegelschieberschaltung
US7782116B2 (en) * 2008-09-05 2010-08-24 Fairchild Semiconductor Corporation Power supply insensitive voltage level translator
KR101497542B1 (ko) * 2008-10-21 2015-03-02 삼성전자주식회사 반도체 소자의 동작 방법
JP5537099B2 (ja) * 2009-09-08 2014-07-02 ルネサスエレクトロニクス株式会社 半導体装置
US9361995B1 (en) * 2015-01-21 2016-06-07 Silicon Storage Technology, Inc. Flash memory system using complementary voltage supplies

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4689504A (en) * 1985-12-20 1987-08-25 Motorola, Inc. High voltage decoder
JPH01226218A (ja) * 1988-03-07 1989-09-08 Canon Inc レベルシフト用集積回路
EP0703665B1 (de) * 1994-09-21 2003-06-11 NEC Electronics Corporation Spannungspegel-Verschiebungsschaltung
US5619150A (en) * 1995-07-07 1997-04-08 Micron Quantum Devices, Inc. Switch for minimizing transistor exposure to high voltage
EP0765035B1 (de) * 1995-09-21 2001-12-19 Matsushita Electric Industrial Co., Ltd. Ausgangsschaltung
JP2803624B2 (ja) * 1996-03-29 1998-09-24 日本電気株式会社 レベルシフト回路
US5933043A (en) * 1996-10-22 1999-08-03 Kabushiki Kaisha Toshiba High speed level shift circuit
JP4074690B2 (ja) * 1997-09-17 2008-04-09 株式会社ルネサステクノロジ 電圧レベル変換回路

Also Published As

Publication number Publication date
CN1229998A (zh) 1999-09-29
KR19990078195A (ko) 1999-10-25
EP0945985B1 (de) 2002-07-24
EP0945985A1 (de) 1999-09-29
US6177824B1 (en) 2001-01-23
JP3389856B2 (ja) 2003-03-24
KR100323323B1 (ko) 2002-02-04
DE69902199T2 (de) 2002-11-21
JPH11273384A (ja) 1999-10-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee