DE69826053D1 - Halbleitersubstrat und Verfahren zu dessen Herstellung - Google Patents

Halbleitersubstrat und Verfahren zu dessen Herstellung

Info

Publication number
DE69826053D1
DE69826053D1 DE69826053T DE69826053T DE69826053D1 DE 69826053 D1 DE69826053 D1 DE 69826053D1 DE 69826053 T DE69826053 T DE 69826053T DE 69826053 T DE69826053 T DE 69826053T DE 69826053 D1 DE69826053 D1 DE 69826053D1
Authority
DE
Germany
Prior art keywords
porous
substrate
image
layer
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69826053T
Other languages
English (en)
Other versions
DE69826053T2 (de
Inventor
Kazuaki Ohmi
Takao Yonehara
Kiyofumi Sakaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Application granted granted Critical
Publication of DE69826053D1 publication Critical patent/DE69826053D1/de
Publication of DE69826053T2 publication Critical patent/DE69826053T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Liquid Crystal (AREA)
DE69826053T 1997-03-26 1998-03-24 Halbleitersubstrat und Verfahren zu dessen Herstellung Expired - Lifetime DE69826053T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7351997 1997-03-26
JP7351997 1997-03-26

Publications (2)

Publication Number Publication Date
DE69826053D1 true DE69826053D1 (de) 2004-10-14
DE69826053T2 DE69826053T2 (de) 2005-09-29

Family

ID=13520585

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69826053T Expired - Lifetime DE69826053T2 (de) 1997-03-26 1998-03-24 Halbleitersubstrat und Verfahren zu dessen Herstellung

Country Status (10)

Country Link
US (1) US20030190794A1 (de)
EP (1) EP0867919B1 (de)
KR (1) KR100356416B1 (de)
CN (1) CN1114936C (de)
AT (1) ATE275761T1 (de)
AU (1) AU742371B2 (de)
CA (1) CA2233132C (de)
DE (1) DE69826053T2 (de)
SG (1) SG68033A1 (de)
TW (1) TW376585B (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6143628A (en) * 1997-03-27 2000-11-07 Canon Kabushiki Kaisha Semiconductor substrate and method of manufacturing the same
US8507361B2 (en) * 2000-11-27 2013-08-13 Soitec Fabrication of substrates with a useful layer of monocrystalline semiconductor material
TWI226139B (en) 2002-01-31 2005-01-01 Osram Opto Semiconductors Gmbh Method to manufacture a semiconductor-component
CN100530705C (zh) 2003-01-31 2009-08-19 奥斯兰姆奥普托半导体有限责任公司 用于制造一个半导体元器件的方法
JP4904150B2 (ja) * 2003-01-31 2012-03-28 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング 発光素子の製造方法
TWI244774B (en) 2003-05-06 2005-12-01 Canon Kk Semiconductor substrate, semiconductor device, light emitting diode and producing method therefor
JP2004335642A (ja) * 2003-05-06 2004-11-25 Canon Inc 基板およびその製造方法
DE102005047149A1 (de) * 2005-09-30 2007-04-12 Osram Opto Semiconductors Gmbh Epitaxiesubstrat, damit hergestelltes Bauelement sowie entsprechende Herstellverfahren
DE102007021991B4 (de) * 2007-05-10 2015-03-26 Infineon Technologies Austria Ag Verfahren zum Herstellen eines Halbleiterbauelements durch Ausbilden einer porösen Zwischenschicht
KR101443580B1 (ko) * 2007-05-11 2014-10-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Soi구조를 갖는 기판
DE102009004559A1 (de) * 2009-01-14 2010-07-22 Institut Für Solarenergieforschung Gmbh Verfahren zum Herstellen eines Halbleiterbauelementes, insbesondere einer Solarzelle, auf Basis einer Halbleiterdünnschicht mit einem direkten Halbleitermaterial
DE102009004560B3 (de) * 2009-01-14 2010-08-26 Institut Für Solarenergieforschung Gmbh Verfahren zum Herstellen eines Halbleiterbauelementes, insbesondere einer Solarzelle, auf Basis einer Germaniumdünnschicht
US8043938B2 (en) * 2009-05-14 2011-10-25 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate and SOI substrate
US9847243B2 (en) 2009-08-27 2017-12-19 Corning Incorporated Debonding a glass substrate from carrier using ultrasonic wave
US8441071B2 (en) * 2010-01-05 2013-05-14 International Business Machines Corporation Body contacted transistor with reduced parasitic capacitance
US8476147B2 (en) * 2010-02-03 2013-07-02 Semiconductor Energy Laboratory Co., Ltd. SOI substrate and manufacturing method thereof
FR2995444B1 (fr) * 2012-09-10 2016-11-25 Soitec Silicon On Insulator Procede de detachement d'une couche
WO2014066740A1 (en) * 2012-10-26 2014-05-01 Element Six Technologies Us Corporation Semiconductor devices with improved reliability and operating life and methods of manufacturing the same
US20180068886A1 (en) * 2016-09-02 2018-03-08 Qualcomm Incorporated Porous semiconductor layer transfer for an integrated circuit structure
JP2019033134A (ja) * 2017-08-04 2019-02-28 株式会社ディスコ ウエーハ生成方法
US11211259B2 (en) * 2018-04-20 2021-12-28 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for embedded gettering in a silicon on insulator wafer
JP2022541172A (ja) * 2019-07-19 2022-09-22 アイキューイー ピーエルシー 調整可能な誘電率及び調整可能な熱伝導率を有する半導体材料
US11903300B2 (en) * 2019-11-18 2024-02-13 Universal Display Corporation Pixel configurations for high resolution OVJP printed OLED displays

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR900001236B1 (ko) * 1984-05-29 1990-03-05 미쓰이도오아쓰 가가꾸 가부시끼가이샤 웨이퍼 가공용필름
US4819387A (en) * 1987-12-16 1989-04-11 Motorola, Inc. Method of slicing semiconductor crystal
EP1179842A3 (de) * 1992-01-31 2002-09-04 Canon Kabushiki Kaisha Halbleitersubstrat und Herstellungsverfahren
KR970009156A (ko) * 1995-07-07 1997-02-24 김광호 보호모드를 가지는 팩시밀리 시스템
CN1076861C (zh) * 1995-07-21 2001-12-26 佳能株式会社 半导体衬底及其制造方法
EP0797258B1 (de) * 1996-03-18 2011-07-20 Sony Corporation Herstellungsverfahren von Dünnschichthalbleitern, Solarzellen und lichtemittierenden Dioden
EP0840381A3 (de) * 1996-10-31 1999-08-04 Sony Corporation Dünnschicht-Halbleiter-Vorrichtung und Verfahren und Vorrichtung zu ihrer Herstellung und Dünnschicht-Sonnenzellenmodul und Herstellungsverfahren
CA2220600C (en) * 1996-11-15 2002-02-12 Canon Kabushiki Kaisha Method of manufacturing semiconductor article

Also Published As

Publication number Publication date
EP0867919B1 (de) 2004-09-08
CA2233132A1 (en) 1998-09-26
SG68033A1 (en) 1999-10-19
CN1114936C (zh) 2003-07-16
EP0867919A2 (de) 1998-09-30
US20030190794A1 (en) 2003-10-09
AU5966698A (en) 1998-10-01
DE69826053T2 (de) 2005-09-29
EP0867919A3 (de) 1999-06-16
KR100356416B1 (ko) 2002-11-18
CA2233132C (en) 2002-04-02
KR19980080688A (ko) 1998-11-25
AU742371B2 (en) 2002-01-03
CN1200560A (zh) 1998-12-02
ATE275761T1 (de) 2004-09-15
TW376585B (en) 1999-12-11

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Legal Events

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