DE69825931D1 - Verfahren zur Herstellung von SOI-Substraten mit einer sehr effizienten Beseitigung von durch Ionenimplantation verursachten Schäden - Google Patents

Verfahren zur Herstellung von SOI-Substraten mit einer sehr effizienten Beseitigung von durch Ionenimplantation verursachten Schäden

Info

Publication number
DE69825931D1
DE69825931D1 DE69825931T DE69825931T DE69825931D1 DE 69825931 D1 DE69825931 D1 DE 69825931D1 DE 69825931 T DE69825931 T DE 69825931T DE 69825931 T DE69825931 T DE 69825931T DE 69825931 D1 DE69825931 D1 DE 69825931D1
Authority
DE
Germany
Prior art keywords
production
ion implantation
damage caused
efficient removal
soi substrates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69825931T
Other languages
English (en)
Other versions
DE69825931T2 (de
Inventor
Youhei Seguchi
Nobuaki Tokushige
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Application granted granted Critical
Publication of DE69825931D1 publication Critical patent/DE69825931D1/de
Publication of DE69825931T2 publication Critical patent/DE69825931T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26533Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically inactive species in silicon to make buried insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02686Pulsed laser beam
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76243Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
DE69825931T 1997-04-11 1998-04-09 Verfahren zur Herstellung von SOI-Substraten mit einer sehr effizienten Beseitigung von durch Ionenimplantation verursachten Schäden Expired - Lifetime DE69825931T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP9092659A JPH10284431A (ja) 1997-04-11 1997-04-11 Soi基板の製造方法
JP9265997 1997-04-11

Publications (2)

Publication Number Publication Date
DE69825931D1 true DE69825931D1 (de) 2004-10-07
DE69825931T2 DE69825931T2 (de) 2005-09-01

Family

ID=14060608

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69825931T Expired - Lifetime DE69825931T2 (de) 1997-04-11 1998-04-09 Verfahren zur Herstellung von SOI-Substraten mit einer sehr effizienten Beseitigung von durch Ionenimplantation verursachten Schäden

Country Status (6)

Country Link
US (1) US6110845A (de)
EP (1) EP0871216B1 (de)
JP (1) JPH10284431A (de)
KR (1) KR19980080967A (de)
DE (1) DE69825931T2 (de)
TW (1) TW452926B (de)

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WO1999039380A1 (fr) * 1998-02-02 1999-08-05 Nippon Steel Corporation Substrat soi et procede de fabrication dudit substrat
JP3211233B2 (ja) * 1998-08-31 2001-09-25 日本電気株式会社 Soi基板及びその製造方法
US6602758B2 (en) * 2001-06-15 2003-08-05 Agere Systems, Inc. Formation of silicon on insulator (SOI) devices as add-on modules for system on a chip processing
US6987240B2 (en) * 2002-04-18 2006-01-17 Applied Materials, Inc. Thermal flux processing by scanning
US8288239B2 (en) 2002-09-30 2012-10-16 Applied Materials, Inc. Thermal flux annealing influence of buried species
US7256112B2 (en) * 2005-01-20 2007-08-14 Chartered Semiconductor Manufacturing, Ltd Laser activation of implanted contact plug for memory bitline fabrication
DE102006007053B4 (de) * 2006-02-15 2008-08-14 Infineon Technologies Austria Ag Optimierte dielektrische Isolationsstrukturen und Verfahren zu deren Herstellung
JP5239183B2 (ja) * 2007-03-20 2013-07-17 株式会社Sumco Soiウェーハ及びその製造方法
KR101440930B1 (ko) * 2007-04-20 2014-09-15 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Soi 기판의 제작방법
KR101443580B1 (ko) * 2007-05-11 2014-10-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Soi구조를 갖는 기판
EP1993127B1 (de) 2007-05-18 2013-04-24 Semiconductor Energy Laboratory Co., Ltd. Verfahren zur Herstellung eines SOI-Substrats
JP5527956B2 (ja) 2007-10-10 2014-06-25 株式会社半導体エネルギー研究所 半導体基板の製造方法
US8236668B2 (en) * 2007-10-10 2012-08-07 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
JP2009135430A (ja) * 2007-10-10 2009-06-18 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP5490393B2 (ja) * 2007-10-10 2014-05-14 株式会社半導体エネルギー研究所 半導体基板の製造方法
WO2009057669A1 (en) * 2007-11-01 2009-05-07 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
JP5404064B2 (ja) 2008-01-16 2014-01-29 株式会社半導体エネルギー研究所 レーザ処理装置、および半導体基板の作製方法
US8119490B2 (en) * 2008-02-04 2012-02-21 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
US20100081251A1 (en) * 2008-09-29 2010-04-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate
US8871610B2 (en) * 2008-10-02 2014-10-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
US8043938B2 (en) * 2009-05-14 2011-10-25 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate and SOI substrate
US8278187B2 (en) * 2009-06-24 2012-10-02 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate by stepwise etching with at least two etching treatments
KR20120032487A (ko) * 2009-06-24 2012-04-05 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기판의 재생 처리 및 soi 기판의 제작 방법
KR101752901B1 (ko) * 2009-08-25 2017-06-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기판의 재생 방법, 재생 반도체 기판의 제작 방법, 및 soi 기판의 제작 방법
US8318588B2 (en) * 2009-08-25 2012-11-27 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate
KR20120059509A (ko) * 2009-08-25 2012-06-08 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제작 방법
WO2011043178A1 (en) * 2009-10-09 2011-04-14 Semiconductor Energy Laboratory Co., Ltd. Reprocessing method of semiconductor substrate, manufacturing method of reprocessed semiconductor substrate, and manufacturing method of soi substrate
TWI500118B (zh) 2010-11-12 2015-09-11 Semiconductor Energy Lab 半導體基底之製造方法
US9123529B2 (en) 2011-06-21 2015-09-01 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate
US9018108B2 (en) 2013-01-25 2015-04-28 Applied Materials, Inc. Low shrinkage dielectric films
US10651281B1 (en) * 2018-12-03 2020-05-12 Globalfoundries Inc. Substrates with self-aligned buried dielectric and polycrystalline layers
CN113838857B (zh) * 2021-10-12 2023-12-12 长江存储科技有限责任公司 三维存储器及制备三维存储器的方法

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US4181538A (en) * 1978-09-26 1980-01-01 The United States Of America As Represented By The United States Department Of Energy Method for making defect-free zone by laser-annealing of doped silicon
JPS56165473A (en) * 1980-05-24 1981-12-19 Semiconductor Res Found Semiconductor pickup device
US4431459A (en) * 1981-07-17 1984-02-14 National Semiconductor Corporation Fabrication of MOSFETs by laser annealing through anti-reflective coating
US4523370A (en) * 1983-12-05 1985-06-18 Ncr Corporation Process for fabricating a bipolar transistor with a thin base and an abrupt base-collector junction
DE3818504A1 (de) * 1988-05-31 1991-01-03 Fraunhofer Ges Forschung Verfahren und vorrichtung fuer die kristallisation duenner halbleiterschichten auf einem substratmaterial
JPH02302044A (ja) * 1989-05-16 1990-12-14 Fujitsu Ltd 半導体装置の製造方法
JPH05335530A (ja) * 1992-05-28 1993-12-17 Sony Corp Soi基板の製造方法
JP3036619B2 (ja) * 1994-03-23 2000-04-24 コマツ電子金属株式会社 Soi基板の製造方法およびsoi基板
FR2720189B1 (fr) * 1994-05-18 1996-08-30 Commissariat Energie Atomique Procédé de réalisation d'une structure à faible taux de dislocations comprenant une couche d'oxyde enterrée dans un substrat semi-conducteur.

Also Published As

Publication number Publication date
DE69825931T2 (de) 2005-09-01
JPH10284431A (ja) 1998-10-23
EP0871216A1 (de) 1998-10-14
US6110845A (en) 2000-08-29
EP0871216B1 (de) 2004-09-01
TW452926B (en) 2001-09-01
KR19980080967A (ko) 1998-11-25

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