DE69734947D1 - Verfahren zur Herstellung von mehrschichtigen Leiterplatten - Google Patents

Verfahren zur Herstellung von mehrschichtigen Leiterplatten

Info

Publication number
DE69734947D1
DE69734947D1 DE69734947T DE69734947T DE69734947D1 DE 69734947 D1 DE69734947 D1 DE 69734947D1 DE 69734947 T DE69734947 T DE 69734947T DE 69734947 T DE69734947 T DE 69734947T DE 69734947 D1 DE69734947 D1 DE 69734947D1
Authority
DE
Germany
Prior art keywords
printed circuit
circuit boards
multilayer printed
producing multilayer
producing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69734947T
Other languages
English (en)
Other versions
DE69734947T2 (de
Inventor
Yoshikazu Takiguchi
Hiroyuki Obiya
Toru Takahashi
Taisuke Shiroyama
Kenji Tazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Ohka Kogyo Co Ltd
Original Assignee
Tokyo Ohka Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP6908396A external-priority patent/JPH09237976A/ja
Priority claimed from JP22076796A external-priority patent/JPH1051142A/ja
Priority claimed from JP24262496A external-priority patent/JPH1070366A/ja
Priority claimed from JP24262596A external-priority patent/JPH1070371A/ja
Priority claimed from JP27747596A external-priority patent/JPH10107446A/ja
Application filed by Tokyo Ohka Kogyo Co Ltd filed Critical Tokyo Ohka Kogyo Co Ltd
Application granted granted Critical
Publication of DE69734947D1 publication Critical patent/DE69734947D1/de
Publication of DE69734947T2 publication Critical patent/DE69734947T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0166—Polymeric layer used for special processing, e.g. resist for etching insulating material or photoresist used as a mask during plasma etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/025—Abrading, e.g. grinding or sand blasting
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
DE69734947T 1996-02-29 1997-02-27 Verfahren zur Herstellung von mehrschichtigen Leiterplatten Expired - Fee Related DE69734947T2 (de)

Applications Claiming Priority (10)

Application Number Priority Date Filing Date Title
JP6908396A JPH09237976A (ja) 1996-02-29 1996-02-29 多層配線板の製造方法
JP6908396 1996-02-29
JP22076796 1996-08-05
JP22076796A JPH1051142A (ja) 1996-08-05 1996-08-05 多層配線板の製造方法
JP24262496A JPH1070366A (ja) 1996-08-26 1996-08-26 多層配線板の製造方法
JP24262596 1996-08-26
JP24262496 1996-08-26
JP24262596A JPH1070371A (ja) 1996-08-26 1996-08-26 多層配線板の製造方法
JP27747596 1996-09-27
JP27747596A JPH10107446A (ja) 1996-09-27 1996-09-27 多層配線板の製造方法

Publications (2)

Publication Number Publication Date
DE69734947D1 true DE69734947D1 (de) 2006-02-02
DE69734947T2 DE69734947T2 (de) 2006-08-24

Family

ID=27524158

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69734947T Expired - Fee Related DE69734947T2 (de) 1996-02-29 1997-02-27 Verfahren zur Herstellung von mehrschichtigen Leiterplatten

Country Status (5)

Country Link
US (2) US6010956A (de)
EP (1) EP0793406B1 (de)
KR (1) KR100429443B1 (de)
DE (1) DE69734947T2 (de)
TW (1) TW322680B (de)

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DE19961103C2 (de) * 1999-12-17 2002-03-14 Infineon Technologies Ag Dielektrische Füllung von elektrischen Verdrahtungsebenen und Verfahren zur Herstellung einer elektrischen Verdrahtung
US6340608B1 (en) * 2000-07-07 2002-01-22 Chartered Semiconductor Manufacturing Ltd. Method of fabricating copper metal bumps for flip-chip or chip-on-board IC bonding on terminating copper pads
EP1342395A2 (de) * 2000-08-15 2003-09-10 WORLD PROPERTIES, INC, an Illinois Corporation Mehrschichtige schaltungen und verfahren zu deren herstellung
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TW544882B (en) * 2001-12-31 2003-08-01 Megic Corp Chip package structure and process thereof
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EP1542518A4 (de) * 2002-06-04 2009-08-26 Sumitomo Electric Industries Leiterplatte für gedruckte verdrahtung, gedruckte leiterplatte und verfahren zu ihrer herstellung
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US20040011555A1 (en) * 2002-07-22 2004-01-22 Chiu Tsung Chin Method for manufacturing printed circuit board with stacked wires and printed circuit board manufacturing according to the mehtod
US20040192876A1 (en) * 2002-11-18 2004-09-30 Nigel Hacker Novolac polymer planarization films with high temparature stability
JPWO2004070823A1 (ja) * 2003-02-05 2006-06-01 株式会社半導体エネルギー研究所 表示装置の作製方法
EP1592052A4 (de) * 2003-02-05 2014-04-23 Semiconductor Energy Lab Verfahren zur displayherstellung
CN100459060C (zh) * 2003-02-05 2009-02-04 株式会社半导体能源研究所 显示装置的制造方法
JP3791616B2 (ja) * 2003-02-06 2006-06-28 セイコーエプソン株式会社 配線基板、電気光学装置及びその製造方法並びに電子機器
JPWO2004070809A1 (ja) * 2003-02-06 2006-05-25 株式会社半導体エネルギー研究所 表示装置の作製方法
JP4748990B2 (ja) * 2003-02-06 2011-08-17 株式会社半導体エネルギー研究所 半導体装置の製造方法
WO2004070821A1 (ja) * 2003-02-06 2004-08-19 Semiconductor Energy Laboratory Co., Ltd. 表示装置の作製方法
US20040211979A1 (en) * 2003-04-24 2004-10-28 Konica Minolta Holdings, Inc. Circuit board and method for manufacturing the circuit board
FR2856552B1 (fr) * 2003-06-23 2005-10-21 Imphy Ugine Precision Procede de fabrication de pieces pour composants electroniques passifs et pieces obtenues
KR101020164B1 (ko) * 2003-07-17 2011-03-08 허니웰 인터내셔날 인코포레이티드 진보된 마이크로전자적 응용을 위한 평탄화 막, 및 이를제조하기 위한 장치 및 방법
WO2006073871A1 (en) * 2004-12-30 2006-07-13 Applied Materials, Inc. Line edge roughness reduction compatible with trimming
EP1860163A4 (de) * 2005-03-11 2009-08-26 Toyo Ink Mfg Co Elektrisch leitfähige tinte, elektrisch leitfähiger schaltkreis sowie nichtkontaktmedium
EP1884992A4 (de) 2005-05-23 2009-10-28 Ibiden Co Ltd Leiterplatte
KR100735411B1 (ko) * 2005-12-07 2007-07-04 삼성전기주식회사 배선기판의 제조방법 및 배선기판
KR100744244B1 (ko) * 2005-12-28 2007-07-30 동부일렉트로닉스 주식회사 반도체 소자의 구리배선 제조 방법
US20070161255A1 (en) * 2006-01-06 2007-07-12 Wilfred Pau Method for etching with hardmask
US8076185B1 (en) 2006-08-23 2011-12-13 Rockwell Collins, Inc. Integrated circuit protection and ruggedization coatings and methods
US8637980B1 (en) 2007-12-18 2014-01-28 Rockwell Collins, Inc. Adhesive applications using alkali silicate glass for electronics
US8617913B2 (en) 2006-08-23 2013-12-31 Rockwell Collins, Inc. Alkali silicate glass based coating and method for applying
US7915527B1 (en) 2006-08-23 2011-03-29 Rockwell Collins, Inc. Hermetic seal and hermetic connector reinforcement and repair with low temperature glass coatings
US8084855B2 (en) 2006-08-23 2011-12-27 Rockwell Collins, Inc. Integrated circuit tampering protection and reverse engineering prevention coatings and methods
US8174830B2 (en) * 2008-05-06 2012-05-08 Rockwell Collins, Inc. System and method for a substrate with internal pumped liquid metal for thermal spreading and cooling
US8166645B2 (en) 2006-08-23 2012-05-01 Rockwell Collins, Inc. Method for providing near-hermetically coated, thermally protected integrated circuit assemblies
US8581108B1 (en) 2006-08-23 2013-11-12 Rockwell Collins, Inc. Method for providing near-hermetically coated integrated circuit assemblies
JP2008140886A (ja) * 2006-11-30 2008-06-19 Shinko Electric Ind Co Ltd 配線基板及びその製造方法
US8034718B2 (en) * 2006-12-12 2011-10-11 International Business Machines Corporation Method to recover patterned semiconductor wafers for rework
US8363189B2 (en) * 2007-12-18 2013-01-29 Rockwell Collins, Inc. Alkali silicate glass for displays
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US8650886B2 (en) * 2008-09-12 2014-02-18 Rockwell Collins, Inc. Thermal spreader assembly with flexible liquid cooling loop having rigid tubing sections and flexible tubing sections
US8017872B2 (en) * 2008-05-06 2011-09-13 Rockwell Collins, Inc. System and method for proportional cooling with liquid metal
US8616266B2 (en) * 2008-09-12 2013-12-31 Rockwell Collins, Inc. Mechanically compliant thermal spreader with an embedded cooling loop for containing and circulating electrically-conductive liquid
US8205337B2 (en) * 2008-09-12 2012-06-26 Rockwell Collins, Inc. Fabrication process for a flexible, thin thermal spreader
US8221089B2 (en) * 2008-09-12 2012-07-17 Rockwell Collins, Inc. Thin, solid-state mechanism for pumping electrically conductive liquids in a flexible thermal spreader
US8119040B2 (en) 2008-09-29 2012-02-21 Rockwell Collins, Inc. Glass thick film embedded passive material
TW201031532A (en) * 2009-02-26 2010-09-01 Taiwan Decor Technology Co Heat transfer-printing film and heat transfer-printing method utilizing the same
JP5378106B2 (ja) * 2009-08-20 2013-12-25 日本シイエムケイ株式会社 プリント配線板の製造方法
TW201216801A (en) * 2010-10-01 2012-04-16 Hung-Ming Lin Manufacturing method of circuit board
KR20130050057A (ko) * 2011-11-07 2013-05-15 삼성전기주식회사 코일 부품의 제조 방법
CN102612276A (zh) * 2012-03-13 2012-07-25 惠州中京电子科技股份有限公司 多层 hdi线路板的微孔制作工艺
US9435915B1 (en) 2012-09-28 2016-09-06 Rockwell Collins, Inc. Antiglare treatment for glass
TWI462672B (zh) * 2013-02-08 2014-11-21 Ichia Tech Inc 前驅基板、軟性印刷電路板及其製造方法
JP5649150B1 (ja) * 2014-07-17 2015-01-07 日本エレクトロプレイテイング・エンジニヤース株式会社 無電解メッキ用前処理液および無電解メッキ方法
US11039541B2 (en) * 2014-11-16 2021-06-15 Nano Dimension Technologies, Ltd. Double-sided and multilayered printed circuit board fabrication using inkjet printing
KR20160093403A (ko) * 2015-01-29 2016-08-08 엘지이노텍 주식회사 전자파차폐구조물
JP7210901B2 (ja) * 2017-06-26 2023-01-24 味の素株式会社 樹脂組成物層
CN110416076B (zh) * 2019-06-05 2021-11-12 福建省福联集成电路有限公司 一种改善金属线路断裂的方法及器件

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Also Published As

Publication number Publication date
TW322680B (de) 1997-12-11
DE69734947T2 (de) 2006-08-24
US6010956A (en) 2000-01-04
EP0793406B1 (de) 2005-12-28
EP0793406A1 (de) 1997-09-03
US6228465B1 (en) 2001-05-08
KR19980018040A (ko) 1998-06-05
KR100429443B1 (ko) 2004-06-16

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8339 Ceased/non-payment of the annual fee