DE69529942T2 - Verfahren zur Herstellung eines Halbleiterbauelements mit einem kapazitiven Element - Google Patents

Verfahren zur Herstellung eines Halbleiterbauelements mit einem kapazitiven Element

Info

Publication number
DE69529942T2
DE69529942T2 DE69529942T DE69529942T DE69529942T2 DE 69529942 T2 DE69529942 T2 DE 69529942T2 DE 69529942 T DE69529942 T DE 69529942T DE 69529942 T DE69529942 T DE 69529942T DE 69529942 T2 DE69529942 T2 DE 69529942T2
Authority
DE
Germany
Prior art keywords
producing
capacitive element
semiconductor component
semiconductor
capacitive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69529942T
Other languages
English (en)
Other versions
DE69529942D1 (de
Inventor
Eiji Fujii
Atsuo Inoue
Koji Arita
Toru Nasu
Akihiro Matsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69529942D1 publication Critical patent/DE69529942D1/de
Application granted granted Critical
Publication of DE69529942T2 publication Critical patent/DE69529942T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
DE69529942T 1994-06-21 1995-06-14 Verfahren zur Herstellung eines Halbleiterbauelements mit einem kapazitiven Element Expired - Fee Related DE69529942T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP06138689A JP3119997B2 (ja) 1994-06-21 1994-06-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69529942D1 DE69529942D1 (de) 2003-04-24
DE69529942T2 true DE69529942T2 (de) 2003-11-06

Family

ID=15227817

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69529942T Expired - Fee Related DE69529942T2 (de) 1994-06-21 1995-06-14 Verfahren zur Herstellung eines Halbleiterbauelements mit einem kapazitiven Element

Country Status (6)

Country Link
US (2) US5644158A (de)
EP (1) EP0689236B1 (de)
JP (1) JP3119997B2 (de)
KR (1) KR100236691B1 (de)
CN (1) CN1079585C (de)
DE (1) DE69529942T2 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5801076A (en) * 1995-02-21 1998-09-01 Advanced Micro Devices, Inc. Method of making non-volatile memory device having a floating gate with enhanced charge retention
US6040616A (en) * 1995-06-06 2000-03-21 Lucent Technologies Inc. Device and method of forming a metal to metal capacitor within an integrated circuit
DE19640241C1 (de) * 1996-09-30 1998-04-16 Siemens Ag Herstellverfahren für eine hoch-epsilon-dielektrische oder ferroelektrische Schicht und Verwendung des Verfahrens
US6045588A (en) 1997-04-29 2000-04-04 Whirlpool Corporation Non-aqueous washing apparatus and method
US6115281A (en) * 1997-06-09 2000-09-05 Telcordia Technologies, Inc. Methods and structures to cure the effects of hydrogen annealing on ferroelectric capacitors
JPH1154721A (ja) * 1997-07-29 1999-02-26 Nec Corp 半導体装置の製造方法および製造装置
KR100539425B1 (ko) * 1998-01-15 2006-03-14 주식회사 휴비스 항균방취성이 우수한 섬유용 폴리에테르에스테르계 탄성사의제조방법
US6232153B1 (en) * 1998-06-04 2001-05-15 Ramtron International Corporation Plastic package assembly method for a ferroelectric-based integrated circuit
JP2000003991A (ja) 1998-06-15 2000-01-07 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6201276B1 (en) * 1998-07-14 2001-03-13 Micron Technology, Inc. Method of fabricating semiconductor devices utilizing in situ passivation of dielectric thin films
US6322849B2 (en) * 1998-11-13 2001-11-27 Symetrix Corporation Recovery of electronic properties in hydrogen-damaged ferroelectrics by low-temperature annealing in an inert gas
TW434877B (en) * 1998-12-03 2001-05-16 Matsushita Electronics Corp Semiconductor memory device and method for manufacturing the same
US6204158B1 (en) * 1998-12-18 2001-03-20 Advanced Technology Materials, Inc. Reduced diffusion of a mobile specie from a metal oxide ceramic into the substrate
KR100308131B1 (ko) * 1999-10-01 2001-11-02 김영환 반도체 소자의 커패시터 제조 방법
KR100471163B1 (ko) * 2002-03-14 2005-03-09 삼성전자주식회사 커패시터들을 갖는 반도체소자의 제조방법
KR100476893B1 (ko) 2002-05-10 2005-03-17 삼성전자주식회사 상변환 기억 셀들 및 그 제조방법들
CN1316573C (zh) * 2002-12-25 2007-05-16 富士通株式会社 半导体装置的制造方法
US20040266211A1 (en) * 2003-02-28 2004-12-30 Board Of Regents, The University Of Texas System Semiconductor interfaces
US6784114B1 (en) * 2003-02-28 2004-08-31 Board Of Regents The University Of Texas System Monatomic layer passivation of semiconductor surfaces
US7504155B2 (en) * 2003-02-28 2009-03-17 Board Of Regents, The University Of Texas System Suppression of chemical reactivity on semiconductor surfaces
US7303996B2 (en) * 2003-10-01 2007-12-04 Taiwan Semiconductor Manufacturing Co., Ltd. High-K gate dielectric stack plasma treatment to adjust threshold voltage characteristics
US7695524B2 (en) 2003-10-31 2010-04-13 Whirlpool Corporation Non-aqueous washing machine and methods
US7739891B2 (en) 2003-10-31 2010-06-22 Whirlpool Corporation Fabric laundering apparatus adapted for using a select rinse fluid
EP1740757A1 (de) 2004-04-29 2007-01-10 Unilever N.V. Chemisches reinigungsverfahren
US7966684B2 (en) 2005-05-23 2011-06-28 Whirlpool Corporation Methods and apparatus to accelerate the drying of aqueous working fluids
US20110053336A1 (en) * 2009-09-03 2011-03-03 Raytheon Company Method for selective deposition of dielectric layers on semiconductor structures
US8883592B2 (en) * 2011-08-05 2014-11-11 Silicon Storage Technology, Inc. Non-volatile memory cell having a high K dielectric and metal gate

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL9000602A (nl) * 1990-03-16 1991-10-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting met geheugenelementen vormende condensatoren met een ferroelectrisch dielectricum.
KR100266045B1 (ko) * 1990-08-07 2000-09-15 야스카와 히데아키 반도체장치
JP3131982B2 (ja) * 1990-08-21 2001-02-05 セイコーエプソン株式会社 半導体装置、半導体メモリ及び半導体装置の製造方法
EP0513894B1 (de) * 1991-05-08 1996-08-28 Koninklijke Philips Electronics N.V. Verfahren zur Herstellung einer Halbleiteranordnung mit einem Kondensator mit einem ferroelektrischen Dieletrikum und Halbleiteranordnung mit einem derartigen Kondensator
JPH05110024A (ja) * 1991-10-18 1993-04-30 Sharp Corp 半導体装置及びその製造方法
EP0557937A1 (de) * 1992-02-25 1993-09-01 Ramtron International Corporation Ozongasverarbeitung für ferroelektrischen Speicherschaltungen
JP3254734B2 (ja) * 1992-06-16 2002-02-12 セイコーエプソン株式会社 強誘電体素子の製造方法

Also Published As

Publication number Publication date
EP0689236A1 (de) 1995-12-27
CN1115119A (zh) 1996-01-17
DE69529942D1 (de) 2003-04-24
CN1079585C (zh) 2002-02-20
KR100236691B1 (ko) 2000-01-15
JPH088404A (ja) 1996-01-12
JP3119997B2 (ja) 2000-12-25
EP0689236B1 (de) 2003-03-19
US5943568A (en) 1999-08-24
US5644158A (en) 1997-07-01
KR960002883A (ko) 1996-01-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee