DE69522514T2 - Halbleiteranordnung und Herstellungsverfahren - Google Patents

Halbleiteranordnung und Herstellungsverfahren

Info

Publication number
DE69522514T2
DE69522514T2 DE69522514T DE69522514T DE69522514T2 DE 69522514 T2 DE69522514 T2 DE 69522514T2 DE 69522514 T DE69522514 T DE 69522514T DE 69522514 T DE69522514 T DE 69522514T DE 69522514 T2 DE69522514 T2 DE 69522514T2
Authority
DE
Germany
Prior art keywords
semiconductor device
manufacturing process
manufacturing
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69522514T
Other languages
English (en)
Other versions
DE69522514D1 (de
Inventor
Yasuhiro Shimada
Toru Nasu
Atsuo Inoue
Yoshihisa Nagano
Koji Arita
Akihiro Matsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69522514D1 publication Critical patent/DE69522514D1/de
Application granted granted Critical
Publication of DE69522514T2 publication Critical patent/DE69522514T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
DE69522514T 1994-06-28 1995-06-01 Halbleiteranordnung und Herstellungsverfahren Expired - Fee Related DE69522514T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6146265A JP3045928B2 (ja) 1994-06-28 1994-06-28 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
DE69522514D1 DE69522514D1 (de) 2001-10-11
DE69522514T2 true DE69522514T2 (de) 2002-04-25

Family

ID=15403835

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69522514T Expired - Fee Related DE69522514T2 (de) 1994-06-28 1995-06-01 Halbleiteranordnung und Herstellungsverfahren

Country Status (6)

Country Link
US (2) US5627391A (de)
EP (1) EP0690507B1 (de)
JP (1) JP3045928B2 (de)
KR (1) KR100187601B1 (de)
CN (1) CN1076875C (de)
DE (1) DE69522514T2 (de)

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US6156638A (en) * 1998-04-10 2000-12-05 Micron Technology, Inc. Integrated circuitry and method of restricting diffusion from one material to another
US6165834A (en) * 1998-05-07 2000-12-26 Micron Technology, Inc. Method of forming capacitors, method of processing dielectric layers, method of forming a DRAM cell
US6255186B1 (en) 1998-05-21 2001-07-03 Micron Technology, Inc. Methods of forming integrated circuitry and capacitors having a capacitor electrode having a base and a pair of walls projecting upwardly therefrom
KR100505605B1 (ko) * 1998-06-15 2005-09-26 삼성전자주식회사 금속막-절연막-금속막 구조의 커패시터 제조방법
US6232131B1 (en) * 1998-06-24 2001-05-15 Matsushita Electronics Corporation Method for manufacturing semiconductor device with ferroelectric capacitors including multiple annealing steps
US5918120A (en) * 1998-07-24 1999-06-29 Taiwan Semiconductor Manufacturing Company, Ltd. Method for fabricating capacitor-over-bit line (COB) dynamic random access memory (DRAM) using tungsten landing plug contacts and Ti/TiN bit lines
JP3533968B2 (ja) 1998-12-22 2004-06-07 セイコーエプソン株式会社 半導体装置の製造方法
KR100280288B1 (ko) * 1999-02-04 2001-01-15 윤종용 반도체 집적회로의 커패시터 제조방법
KR100349642B1 (ko) * 1999-06-28 2002-08-22 주식회사 하이닉스반도체 강유전체 메모리 소자 및 그 제조 방법
JP3353833B2 (ja) * 1999-07-09 2002-12-03 日本電気株式会社 半導体装置およびその製造方法
KR100326253B1 (ko) * 1999-12-28 2002-03-08 박종섭 반도체 소자의 캐패시터 형성방법
US7005695B1 (en) 2000-02-23 2006-02-28 Micron Technology, Inc. Integrated circuitry including a capacitor with an amorphous and a crystalline high K capacitor dielectric region
JP3480416B2 (ja) 2000-03-27 2003-12-22 セイコーエプソン株式会社 半導体装置
JP3449333B2 (ja) 2000-03-27 2003-09-22 セイコーエプソン株式会社 半導体装置の製造方法
JP2001284526A (ja) * 2000-03-28 2001-10-12 Nec Yamagata Ltd 半導体集積回路用ｍｉｍ容量装置
JP3450262B2 (ja) * 2000-03-29 2003-09-22 Ｎｅｃエレクトロニクス株式会社 回路製造方法、回路装置
JP4390367B2 (ja) * 2000-06-07 2009-12-24 Ｎｅｃエレクトロニクス株式会社 半導体装置の製造方法
US6750113B2 (en) * 2001-01-17 2004-06-15 International Business Machines Corporation Metal-insulator-metal capacitor in copper
KR100410716B1 (ko) * 2001-03-07 2003-12-18 주식회사 하이닉스반도체 캐패시터의 하부전극을 스토리지노드와 연결할 수 있는강유전체 메모리 소자 및 그 제조 방법
ES2421532T3 (es) * 2001-06-21 2013-09-03 Dynavax Tech Corp Compuestos inmunomoduladores quiméricos y métodos de uso de los mismos
JP2003204043A (ja) * 2001-10-24 2003-07-18 Fujitsu Ltd 半導体装置及びその製造方法
JP4005805B2 (ja) * 2001-12-17 2007-11-14 株式会社東芝 半導体装置
US6719015B2 (en) * 2002-01-04 2004-04-13 Ppl Technolgies, L.L.C. Apparatus and process for manufacturing a filled flexible pouch
US6900106B2 (en) * 2002-03-06 2005-05-31 Micron Technology, Inc. Methods of forming capacitor constructions
US7102367B2 (en) * 2002-07-23 2006-09-05 Fujitsu Limited Probe card and testing method of semiconductor chip, capacitor and manufacturing method thereof
WO2005024950A1 (ja) 2003-09-05 2005-03-17 Fujitsu Limited 半導体装置及びその製造方法
JP2005116756A (ja) * 2003-10-07 2005-04-28 Fujitsu Ltd 半導体装置及びその製造方法
CN100530615C (zh) * 2004-11-24 2009-08-19 鸿富锦精密工业（深圳）有限公司 散热装置及其制备方法
DE102007035834A1 (de) * 2007-07-31 2009-02-05 Advanced Micro Devices, Inc., Sunnyvale Halbleiterbauelement mit lokal erhöhtem Elektromigrationswiderstand in einer Verbindungsstruktur
US8883592B2 (en) * 2011-08-05 2014-11-11 Silicon Storage Technology, Inc. Non-volatile memory cell having a high K dielectric and metal gate
KR102274369B1 (ko) 2013-09-23 2021-07-07 삼성전자주식회사 진공 청소기
CN104746006B (zh) * 2013-12-31 2017-06-06 北京北方微电子基地设备工艺研究中心有限责任公司 可调节TiW薄膜应力的TiW薄膜的磁控溅射制备工艺

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US5266829A (en) * 1986-05-09 1993-11-30 Actel Corporation Electrically-programmable low-impedance anti-fuse element
US5005102A (en) * 1989-06-20 1991-04-02 Ramtron Corporation Multilayer electrodes for integrated circuit capacitors
JPH0493065A (ja) * 1990-08-09 1992-03-25 Seiko Epson Corp 半導体装置の構造及び製造方法
WO1992006498A1 (en) * 1990-09-28 1992-04-16 Seiko Epson Corporation Semiconductor device
DE69213094T2 (de) * 1991-05-08 1997-03-06 Philips Electronics Nv Verfahren zur Herstellung einer Halbleiteranordnung mit einem Kondensator mit einem ferroelektrischen Dieletrikum und Halbleiteranordnung mit einem derartigen Kondensator
US5191510A (en) * 1992-04-29 1993-03-02 Ramtron International Corporation Use of palladium as an adhesion layer and as an electrode in ferroelectric memory devices
JP2762851B2 (ja) * 1992-07-27 1998-06-04 日本電気株式会社 半導体装置の製造方法
JP3319869B2 (ja) * 1993-06-24 2002-09-03 三菱電機株式会社 半導体記憶装置およびその製造方法
DE69432643T2 (de) * 1993-08-05 2004-04-08 Matsushita Electric Industrial Co., Ltd., Kadoma Halbleiterbauelement mit Kondensator
US5443688A (en) * 1993-12-02 1995-08-22 Raytheon Company Method of manufacturing a ferroelectric device using a plasma etching process
JP2875733B2 (ja) * 1994-02-15 1999-03-31 松下電子工業株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
US5627391A (en) 1997-05-06
CN1128406A (zh) 1996-08-07
EP0690507B1 (de) 2001-09-05
DE69522514D1 (de) 2001-10-11
US5837591A (en) 1998-11-17
KR960002804A (ko) 1996-01-26
EP0690507A1 (de) 1996-01-03
JPH0817759A (ja) 1996-01-19
CN1076875C (zh) 2001-12-26
KR100187601B1 (ko) 1999-06-01
JP3045928B2 (ja) 2000-05-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee