DE69500388T2 - Filmschaltungs-Metallsystem zur Verwendung in IC-Bauteilen mit Kontakthöckern - Google Patents

Filmschaltungs-Metallsystem zur Verwendung in IC-Bauteilen mit Kontakthöckern

Info

Publication number
DE69500388T2
DE69500388T2 DE69500388T DE69500388T DE69500388T2 DE 69500388 T2 DE69500388 T2 DE 69500388T2 DE 69500388 T DE69500388 T DE 69500388T DE 69500388 T DE69500388 T DE 69500388T DE 69500388 T2 DE69500388 T2 DE 69500388T2
Authority
DE
Germany
Prior art keywords
layer
gold
nickel
thick
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69500388T
Other languages
German (de)
English (en)
Other versions
DE69500388D1 (de
Inventor
Richard Paul Debiec
Michael D Evans
Warren J Pendergast
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Application granted granted Critical
Publication of DE69500388D1 publication Critical patent/DE69500388D1/de
Publication of DE69500388T2 publication Critical patent/DE69500388T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/16—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0315—Oxidising metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Multi-Conductor Connections (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Combinations Of Printed Boards (AREA)
DE69500388T 1994-04-01 1995-03-21 Filmschaltungs-Metallsystem zur Verwendung in IC-Bauteilen mit Kontakthöckern Expired - Lifetime DE69500388T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/221,731 US5449955A (en) 1994-04-01 1994-04-01 Film circuit metal system for use with bumped IC packages

Publications (2)

Publication Number Publication Date
DE69500388D1 DE69500388D1 (de) 1997-08-07
DE69500388T2 true DE69500388T2 (de) 1997-10-23

Family

ID=22829115

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69500388T Expired - Lifetime DE69500388T2 (de) 1994-04-01 1995-03-21 Filmschaltungs-Metallsystem zur Verwendung in IC-Bauteilen mit Kontakthöckern

Country Status (7)

Country Link
US (1) US5449955A (enExample)
EP (1) EP0675674B1 (enExample)
JP (1) JP3373324B2 (enExample)
KR (1) KR100304993B1 (enExample)
DE (1) DE69500388T2 (enExample)
HK (1) HK1000549A1 (enExample)
TW (1) TW278223B (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10239081A1 (de) * 2002-08-26 2004-03-11 Infineon Technologies Ag Verfahren zur Herstellung einer Halbleitereinrichtung und entsprechende Halbleitereinrichtung
DE10238816A1 (de) * 2002-08-23 2004-03-11 Infineon Technologies Ag Verfahren zur Herstellung von Anschlussbereichen einer integrierten Schaltung und integrierte Schaltung mit Anschlussbereichen
DE10240921A1 (de) * 2002-09-02 2004-03-18 Infineon Technologies Ag Verfahren und Anordnung zum selektiven Metallisieren von 3-D-Strukturen

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2927897A (en) * 1996-04-29 1997-11-19 Carl Shine Multilayer solder/barrier attach for semiconductor chip
US5989989A (en) * 1996-05-31 1999-11-23 Texas Instruments Incorporated Die and cube reroute process
DE19712219A1 (de) * 1997-03-24 1998-10-01 Bosch Gmbh Robert Verfahren zur Herstellung von Lothöckern definierter Größe
US6082610A (en) * 1997-06-23 2000-07-04 Ford Motor Company Method of forming interconnections on electronic modules
US6093966A (en) * 1998-03-20 2000-07-25 Motorola, Inc. Semiconductor device with a copper barrier layer and formation thereof
EP1110905A1 (en) * 1999-12-24 2001-06-27 SensoNor asa Micro-electromechanical device
KR100455678B1 (ko) * 2002-02-06 2004-11-06 마이크로스케일 주식회사 반도체 플립칩 패키지를 위한 솔더 범프 구조 및 그 제조방법
JP2003303842A (ja) * 2002-04-12 2003-10-24 Nec Electronics Corp 半導体装置およびその製造方法
TW550800B (en) * 2002-05-27 2003-09-01 Via Tech Inc Integrated circuit package without solder mask and method for the same
SG107600A1 (en) * 2002-06-27 2004-12-29 Agency Science Tech & Res Multilayer substrate metallization for ic interconnection
DE10251658B4 (de) * 2002-11-01 2005-08-25 Atotech Deutschland Gmbh Verfahren zum Verbinden von zur Herstellung von Mikrostrukturbauteilen geeigneten, mikrostrukturierten Bauteillagen sowie Mikrostrukturbauteil
US7223695B2 (en) * 2004-09-30 2007-05-29 Intel Corporation Methods to deposit metal alloy barrier layers
WO2006070808A1 (ja) * 2004-12-28 2006-07-06 Rohm Co., Ltd. 半導体チップおよびその製造方法、半導体チップの電極構造およびその形成方法、ならびに半導体装置
US20080157910A1 (en) * 2006-12-29 2008-07-03 Park Chang-Min Amorphous soft magnetic layer for on-die inductively coupled wires
FR2952314B1 (fr) * 2009-11-12 2012-02-10 Sagem Defense Securite Procede de brasage, gyroscope et piece brasee
KR101444629B1 (ko) * 2010-11-16 2014-09-26 미쓰비시덴키 가부시키가이샤 반도체 소자, 반도체 장치 및 반도체 소자의 제조 방법
CN103258809A (zh) * 2012-02-15 2013-08-21 稳懋半导体股份有限公司 三五族化合物半导体组件的铜金属连接线
JP2015012112A (ja) * 2013-06-28 2015-01-19 京セラサーキットソリューションズ株式会社 配線基板
CN112687556B (zh) * 2020-12-24 2023-07-18 中国电子科技集团公司第十三研究所 在基板表面集成bga焊盘的阻焊制备方法及结构
US11830806B2 (en) * 2021-04-29 2023-11-28 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and method of manufacturing the same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3451030A (en) * 1966-07-01 1969-06-17 Gen Electric Solder-bonded semiconductor strain gauges
GB1202199A (en) * 1966-11-22 1970-08-12 G V Planer Ltd Improvements in or relating to thermoelectric devices
US3622385A (en) * 1968-07-19 1971-11-23 Hughes Aircraft Co Method of providing flip-chip devices with solderable connections
US3781596A (en) * 1972-07-07 1973-12-25 R Galli Semiconductor chip carriers and strips thereof
DE2554691C2 (de) * 1974-12-10 1982-11-18 Western Electric Co., Inc., 10038 New York, N.Y. Verfahren zum Herstellen elektrischer Leiter auf einem isolierenden Substrat und danach hergestellte Dünnschichtschaltung
US4016050A (en) * 1975-05-12 1977-04-05 Bell Telephone Laboratories, Incorporated Conduction system for thin film and hybrid integrated circuits
JPS5715432A (en) * 1980-07-01 1982-01-26 Mitsubishi Electric Corp Semiconductor element
GB2176938A (en) * 1985-06-24 1987-01-07 Nat Semiconductor Corp Pad metallization structure
US5288951A (en) 1992-10-30 1994-02-22 At&T Bell Laboratories Copper-based metallizations for hybrid integrated circuits

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10238816A1 (de) * 2002-08-23 2004-03-11 Infineon Technologies Ag Verfahren zur Herstellung von Anschlussbereichen einer integrierten Schaltung und integrierte Schaltung mit Anschlussbereichen
US7087512B2 (en) 2002-08-23 2006-08-08 Infineon Technologies Ag Method for fabricating connection regions of an integrated circuit, and integrated circuit having connection regions
DE10238816B4 (de) * 2002-08-23 2008-01-10 Qimonda Ag Verfahren zur Herstellung von Anschlussbereichen einer integrierten Schaltung und integrierte Schaltung mit Anschlussbereichen
DE10239081A1 (de) * 2002-08-26 2004-03-11 Infineon Technologies Ag Verfahren zur Herstellung einer Halbleitereinrichtung und entsprechende Halbleitereinrichtung
DE10239081B4 (de) * 2002-08-26 2007-12-20 Qimonda Ag Verfahren zur Herstellung einer Halbleitereinrichtung
DE10240921A1 (de) * 2002-09-02 2004-03-18 Infineon Technologies Ag Verfahren und Anordnung zum selektiven Metallisieren von 3-D-Strukturen
US7211504B2 (en) 2002-09-02 2007-05-01 Infineon Technologies Ag Process and arrangement for the selective metallization of 3D structures
DE10240921B4 (de) * 2002-09-02 2007-12-13 Qimonda Ag Verfahren und Anordnung zum selektiven Metallisieren von 3-D-Strukturen

Also Published As

Publication number Publication date
EP0675674A1 (en) 1995-10-04
TW278223B (enExample) 1996-06-11
EP0675674B1 (en) 1997-07-02
US5449955A (en) 1995-09-12
DE69500388D1 (de) 1997-08-07
HK1000549A1 (en) 1998-04-03
KR100304993B1 (ko) 2001-11-30
JP3373324B2 (ja) 2003-02-04
KR950034675A (ko) 1995-12-28
JPH07297540A (ja) 1995-11-10

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Legal Events

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8364 No opposition during term of opposition