DE69430114T2 - Element-Anschlussfläche für Halbleiteranordnungsmontageplatte - Google Patents

Element-Anschlussfläche für Halbleiteranordnungsmontageplatte

Info

Publication number
DE69430114T2
DE69430114T2 DE69430114T DE69430114T DE69430114T2 DE 69430114 T2 DE69430114 T2 DE 69430114T2 DE 69430114 T DE69430114 T DE 69430114T DE 69430114 T DE69430114 T DE 69430114T DE 69430114 T2 DE69430114 T2 DE 69430114T2
Authority
DE
Germany
Prior art keywords
mounting plate
assembly mounting
semiconductor assembly
element pad
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69430114T
Other languages
English (en)
Other versions
DE69430114D1 (de
Inventor
Akinobu Shibuya
Mitsuru Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69430114D1 publication Critical patent/DE69430114D1/de
Publication of DE69430114T2 publication Critical patent/DE69430114T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H05K3/246—Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
DE69430114T 1993-12-27 1994-12-22 Element-Anschlussfläche für Halbleiteranordnungsmontageplatte Expired - Lifetime DE69430114T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5330278A JP2606115B2 (ja) 1993-12-27 1993-12-27 半導体実装基板用素子接合パッド

Publications (2)

Publication Number Publication Date
DE69430114D1 DE69430114D1 (de) 2002-04-18
DE69430114T2 true DE69430114T2 (de) 2002-11-07

Family

ID=18230867

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69430114T Expired - Lifetime DE69430114T2 (de) 1993-12-27 1994-12-22 Element-Anschlussfläche für Halbleiteranordnungsmontageplatte

Country Status (4)

Country Link
US (1) US5485352A (de)
EP (1) EP0660404B1 (de)
JP (1) JP2606115B2 (de)
DE (1) DE69430114T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5910644A (en) * 1997-06-11 1999-06-08 International Business Machines Corporation Universal surface finish for DCA, SMT and pad on pad interconnections
US6476332B1 (en) 2001-09-12 2002-11-05 Visteon Global Technologies, Inc. Conductor systems for thick film electronic circuits
DE10333439A1 (de) * 2003-07-23 2005-02-17 Robert Bosch Gmbh Verfahren zur Herstellung eines aus mehreren Verdrahtungsebenen bestehenden Hybrid-Produktes
WO2008141481A1 (fr) * 2007-05-24 2008-11-27 Princo Corp. Structure et procédé de fabrication d'un câblage métallique sur une carte multicouches
TWI354523B (en) * 2007-05-25 2011-12-11 Princo Corp Method for manufacturing metal lines in multi-laye
US8815333B2 (en) 2007-12-05 2014-08-26 Princo Middle East Fze Manufacturing method of metal structure in multi-layer substrate

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3964666A (en) * 1975-03-31 1976-06-22 Western Electric Company, Inc. Bonding contact members to circuit boards
JPS584955A (ja) * 1981-06-30 1983-01-12 Shinko Electric Ind Co Ltd 金めつきされた電子部品パツケ−ジ
JPS59114846A (ja) * 1982-12-21 1984-07-03 Narumi China Corp 半導体塔載用セラミツクパツケ−ジ
JPS59121957A (ja) * 1982-12-28 1984-07-14 Nec Corp 半導体装置用容器の製造方法
GB2134136B (en) * 1983-01-19 1986-03-26 Shell Int Research An electronic conduit and a method of manufacturing it
DE3312713A1 (de) * 1983-04-08 1984-10-11 The Furukawa Electric Co., Ltd., Tokio/Tokyo Silberbeschichtete elektrische materialien und verfahren zu ihrer herstellung
JPS6196754A (ja) * 1984-10-17 1986-05-15 Nec Corp ピン付き基板
JPS628533A (ja) * 1985-07-05 1987-01-16 Hitachi Ltd 金めつきされた電子部品パツケ−ジ
JP2554358B2 (ja) * 1988-05-25 1996-11-13 沖電気工業株式会社 配線基板及び配線基板の製造方法
JP2572823B2 (ja) * 1988-09-22 1997-01-16 日本碍子株式会社 セラミック接合体
JPH0484449A (ja) * 1990-07-27 1992-03-17 Shinko Electric Ind Co Ltd Ｔａｂテープ
JPH04101489A (ja) * 1990-08-20 1992-04-02 Kyocera Corp 薄膜配線基板
JPH0628533A (ja) * 1992-07-07 1994-02-04 Dainippon Printing Co Ltd Ｉｃカードとｉｃカードのデータ記憶方法
JP2783093B2 (ja) * 1992-10-21 1998-08-06 日本電気株式会社 プリント配線板
JP2832411B2 (ja) * 1992-12-22 1998-12-09 日本航空電子工業株式会社 スーパールミネッセントダイオード

Also Published As

Publication number Publication date
EP0660404A2 (de) 1995-06-28
EP0660404A3 (de) 1996-03-27
US5485352A (en) 1996-01-16
JP2606115B2 (ja) 1997-04-30
EP0660404B1 (de) 2002-03-13
DE69430114D1 (de) 2002-04-18
JPH07193161A (ja) 1995-07-28

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Legal Events

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8364 No opposition during term of opposition