DE69416734D1 - Logikgatter bestehend aus Halbleitertransistoren - Google Patents

Logikgatter bestehend aus Halbleitertransistoren

Info

Publication number
DE69416734D1
DE69416734D1 DE69416734T DE69416734T DE69416734D1 DE 69416734 D1 DE69416734 D1 DE 69416734D1 DE 69416734 T DE69416734 T DE 69416734T DE 69416734 T DE69416734 T DE 69416734T DE 69416734 D1 DE69416734 D1 DE 69416734D1
Authority
DE
Germany
Prior art keywords
logic gate
semiconductor transistors
gate consisting
transistors
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69416734T
Other languages
English (en)
Other versions
DE69416734T2 (de
Inventor
Takumi Miyashita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69416734D1 publication Critical patent/DE69416734D1/de
Application granted granted Critical
Publication of DE69416734T2 publication Critical patent/DE69416734T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0952—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using Schottky type FET MESFET
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
DE69416734T 1993-06-30 1994-06-27 Logikgatter bestehend aus Halbleitertransistoren Expired - Fee Related DE69416734T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5160544A JPH0774619A (ja) 1993-06-30 1993-06-30 論理ゲート回路

Publications (2)

Publication Number Publication Date
DE69416734D1 true DE69416734D1 (de) 1999-04-08
DE69416734T2 DE69416734T2 (de) 1999-07-01

Family

ID=15717285

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69416734T Expired - Fee Related DE69416734T2 (de) 1993-06-30 1994-06-27 Logikgatter bestehend aus Halbleitertransistoren

Country Status (5)

Country Link
US (1) US5726591A (de)
EP (1) EP0632596B1 (de)
JP (1) JPH0774619A (de)
KR (1) KR0154172B1 (de)
DE (1) DE69416734T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000134085A (ja) * 1998-09-16 2000-05-12 Microchip Technol Inc 低電力デジタル入力回路
JP5088034B2 (ja) * 2006-08-14 2012-12-05 ソニー株式会社 物質の検出等に有用な核酸鎖とその方法
JP5015029B2 (ja) 2007-03-09 2012-08-29 パナソニック株式会社 昇圧回路に用いられる電流制御回路
JP5511975B2 (ja) * 2009-11-24 2014-06-04 エプコス アクチエンゲゼルシャフト 低電流の論理およびドライバ回路
US10234887B2 (en) * 2012-12-26 2019-03-19 Allegro Microsystems, Llc Output driver having reduced electromagnetic susceptibility and associated methods
CN117981225A (zh) * 2021-09-13 2024-05-03 尼洛有限公司 泄漏容忍逻辑门的实现

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4716311A (en) * 1985-04-25 1987-12-29 Triquint Direct coupled FET logic with super buffer output stage
US4810969A (en) * 1987-06-23 1989-03-07 Honeywell Inc. High speed logic circuit having feedback to prevent current in the output stage
JPH025618A (ja) * 1988-06-23 1990-01-10 Fujitsu Ltd 論理回路
US4935647A (en) * 1988-10-19 1990-06-19 Vitesse Semiconductor Corporation Group III - V semiconductor devices with improved switching speeds
JP2538011B2 (ja) * 1988-12-08 1996-09-25 沖電気工業株式会社 駆動回路
KR900012436A (ko) * 1989-01-25 1990-08-04 미다 가쓰시게 논리 회로
JPH02209011A (ja) * 1989-02-09 1990-08-20 Agency Of Ind Science & Technol ＧａＡｓ半導体回路
US5107144A (en) * 1989-03-03 1992-04-21 Nec Corporation Integrated circuit having field effect transistors
US5182473A (en) * 1990-07-31 1993-01-26 Cray Research, Inc. Emitter emitter logic (EEL) and emitter collector dotted logic (ECDL) families
US5343091A (en) * 1992-01-31 1994-08-30 Kabushiki Kaisha Toshiba Semiconductor logic integrated circuit having improved noise margin over DCFL circuits

Also Published As

Publication number Publication date
KR0154172B1 (ko) 1998-12-15
EP0632596A3 (de) 1996-03-20
EP0632596A2 (de) 1995-01-04
DE69416734T2 (de) 1999-07-01
EP0632596B1 (de) 1999-03-03
US5726591A (en) 1998-03-10
KR950001992A (ko) 1995-01-04
JPH0774619A (ja) 1995-03-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee