DE69412974T2 - Feldeffekttransistor mit Kontaktflächen - Google Patents

Feldeffekttransistor mit Kontaktflächen

Info

Publication number
DE69412974T2
DE69412974T2 DE69412974T DE69412974T DE69412974T2 DE 69412974 T2 DE69412974 T2 DE 69412974T2 DE 69412974 T DE69412974 T DE 69412974T DE 69412974 T DE69412974 T DE 69412974T DE 69412974 T2 DE69412974 T2 DE 69412974T2
Authority
DE
Germany
Prior art keywords
dielectric layer
layer
depositing
portions
dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69412974T
Other languages
German (de)
English (en)
Other versions
DE69412974D1 (de
Inventor
Kuo-Hua Wescosville Pennsylvania 18106 Lee
Chun-Ting Wescosville Pennsylvania 18106 Liu
Ruichen Warren New Jersey 07060 Liu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Application granted granted Critical
Publication of DE69412974D1 publication Critical patent/DE69412974D1/de
Publication of DE69412974T2 publication Critical patent/DE69412974T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/0698—Local interconnections

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Heterocyclic Carbon Compounds Containing A Hetero Ring Having Oxygen Or Sulfur (AREA)
DE69412974T 1993-12-01 1994-11-23 Feldeffekttransistor mit Kontaktflächen Expired - Fee Related DE69412974T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/159,897 US5407859A (en) 1993-12-01 1993-12-01 Field effect transistor with landing pad

Publications (2)

Publication Number Publication Date
DE69412974D1 DE69412974D1 (de) 1998-10-08
DE69412974T2 true DE69412974T2 (de) 1999-02-11

Family

ID=22574570

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69412974T Expired - Fee Related DE69412974T2 (de) 1993-12-01 1994-11-23 Feldeffekttransistor mit Kontaktflächen

Country Status (7)

Country Link
US (1) US5407859A (ref)
EP (1) EP0656649B1 (ref)
JP (1) JP2944902B2 (ref)
KR (1) KR950021767A (ref)
DE (1) DE69412974T2 (ref)
ES (1) ES2120578T3 (ref)
TW (1) TW257885B (ref)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0170285B1 (ko) * 1995-05-12 1999-03-30 김광호 반도체 장치의 소자 분리 방법
US5686761A (en) * 1995-06-06 1997-11-11 Advanced Micro Devices, Inc. Production worthy interconnect process for deep sub-half micrometer back-end-of-line technology

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1216962A (en) * 1985-06-28 1987-01-20 Hussein M. Naguib Mos device processing
US4844776A (en) * 1987-12-04 1989-07-04 American Telephone And Telegraph Company, At&T Bell Laboratories Method for making folded extended window field effect transistor
US4922311A (en) * 1987-12-04 1990-05-01 American Telephone And Telegraph Company Folded extended window field effect transistor
US5234851A (en) * 1989-09-05 1993-08-10 General Electric Company Small cell, low contact assistance rugged power field effect devices and method of fabrication
US5017515A (en) * 1989-10-02 1991-05-21 Texas Instruments Incorporated Process for minimizing lateral distance between elements in an integrated circuit by using sidewall spacers
JP2995838B2 (ja) * 1990-01-11 1999-12-27 セイコーエプソン株式会社 Ｍｉｓ型半導体装置及びその製造方法
US5206187A (en) * 1991-08-30 1993-04-27 Micron Technology, Inc. Method of processing semiconductor wafers using a contact etch stop
US5340761A (en) * 1991-10-31 1994-08-23 Vlsi Technology, Inc. Self-aligned contacts with gate overlapped lightly doped drain (goldd) structure

Also Published As

Publication number Publication date
TW257885B (ref) 1995-09-21
KR950021767A (ko) 1995-07-26
US5407859A (en) 1995-04-18
JP2944902B2 (ja) 1999-09-06
ES2120578T3 (es) 1998-11-01
EP0656649B1 (en) 1998-09-02
DE69412974D1 (de) 1998-10-08
EP0656649A1 (en) 1995-06-07
JPH07202200A (ja) 1995-08-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee