DE69312049T2 - Kupferkaschiertes Laminat und Leiterplatte - Google Patents

Kupferkaschiertes Laminat und Leiterplatte

Info

Publication number
DE69312049T2
DE69312049T2 DE69312049T DE69312049T DE69312049T2 DE 69312049 T2 DE69312049 T2 DE 69312049T2 DE 69312049 T DE69312049 T DE 69312049T DE 69312049 T DE69312049 T DE 69312049T DE 69312049 T2 DE69312049 T2 DE 69312049T2
Authority
DE
Germany
Prior art keywords
copper
clad laminate
circuit board
surface side
present
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Revoked
Application number
DE69312049T
Other languages
English (en)
Other versions
DE69312049D1 (de
Inventor
Muneo Saida
Yutaka Hirasawa
Katsuhiro Yoshimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Polyclad Laminates Inc
Original Assignee
Polyclad Laminates Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=13867972&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69312049(T2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Polyclad Laminates Inc filed Critical Polyclad Laminates Inc
Application granted granted Critical
Publication of DE69312049D1 publication Critical patent/DE69312049D1/de
Publication of DE69312049T2 publication Critical patent/DE69312049T2/de
Anticipated expiration legal-status Critical
Revoked legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
    • H05K3/384—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10439—Position of a single component
    • H05K2201/10477—Inverted
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0307—Providing micro- or nanometer scale roughness on a metal surface, e.g. by plating of nodules or dendrites
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0353—Making conductive layer thin, e.g. by etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0392—Pretreatment of metal, e.g. before finish plating, etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0723—Electroplating, e.g. finish plating
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/922—Static electricity metal bleed-off metallic stock
    • Y10S428/9335—Product by special process
    • Y10S428/934—Electrical process
    • Y10S428/935—Electroplating
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12472—Microscopic interfacial wave or roughness
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12535—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.] with additional, spatially distinct nonmetal component
    • Y10T428/12556—Organic component
    • Y10T428/12569—Synthetic resin
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/28—Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/28—Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • Y10T428/2804—Next to metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Laminated Bodies (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
DE69312049T 1993-03-19 1993-11-05 Kupferkaschiertes Laminat und Leiterplatte Revoked DE69312049T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5085765A JP2762386B2 (ja) 1993-03-19 1993-03-19 銅張り積層板およびプリント配線板

Publications (2)

Publication Number Publication Date
DE69312049D1 DE69312049D1 (de) 1997-08-14
DE69312049T2 true DE69312049T2 (de) 1998-02-26

Family

ID=13867972

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69312049T Revoked DE69312049T2 (de) 1993-03-19 1993-11-05 Kupferkaschiertes Laminat und Leiterplatte

Country Status (10)

Country Link
US (1) US5437914A (de)
EP (1) EP0616489B1 (de)
JP (1) JP2762386B2 (de)
KR (1) KR0127665B1 (de)
AT (1) ATE155311T1 (de)
DE (1) DE69312049T2 (de)
ES (1) ES2105046T3 (de)
MY (1) MY108905A (de)
SG (1) SG46186A1 (de)
TW (1) TW232120B (de)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5779870A (en) * 1993-03-05 1998-07-14 Polyclad Laminates, Inc. Method of manufacturing laminates and printed circuit boards
JPH08222857A (ja) * 1995-02-16 1996-08-30 Mitsui Mining & Smelting Co Ltd 銅箔および該銅箔を内層回路用に用いた高密度多層プリント回路基板
US5679230A (en) * 1995-08-21 1997-10-21 Oak-Mitsui, Inc. Copper foil for printed circuit boards
JP3155920B2 (ja) * 1996-01-16 2001-04-16 三井金属鉱業株式会社 プリント配線板用電解銅箔及びその製造方法
US6117300A (en) * 1996-05-01 2000-09-12 Honeywell International Inc. Method for forming conductive traces and printed circuits made thereby
US5863666A (en) * 1997-08-07 1999-01-26 Gould Electronics Inc. High performance flexible laminate
KR100327955B1 (ko) * 1996-08-23 2002-05-09 마이클 에이. 센타니 고성능가요성라미네이트
WO1998010628A1 (de) * 1996-09-05 1998-03-12 Siemens Aktiengesellschaft Trägerelement für einen halbleiterchip
US5989727A (en) * 1998-03-04 1999-11-23 Circuit Foil U.S.A., Inc. Electrolytic copper foil having a modified shiny side
JP3291482B2 (ja) * 1999-08-31 2002-06-10 三井金属鉱業株式会社 整面電解銅箔、その製造方法および用途
JP3291486B2 (ja) * 1999-09-06 2002-06-10 三井金属鉱業株式会社 整面電解銅箔、その製造方法およびその用途
US6372113B2 (en) 1999-09-13 2002-04-16 Yates Foil Usa, Inc. Copper foil and copper clad laminates for fabrication of multi-layer printed circuit boards and process for producing same
US6270648B1 (en) 1999-10-22 2001-08-07 Yates Foil Usa, Inc. Process and apparatus for the manufacture of high peel-strength copper foil useful in the manufacture of printed circuit boards, and laminates made with such foil
JP3250994B2 (ja) * 1999-12-28 2002-01-28 三井金属鉱業株式会社 電解銅箔
WO2001077420A1 (fr) * 2000-04-05 2001-10-18 Nikko Materials Company, Limited Forage de trou par laser dans une tôle de cuivre
JP3628585B2 (ja) 2000-04-05 2005-03-16 株式会社日鉱マテリアルズ 銅張り積層板及び銅張り積層板のレーザーによる穴開け方法
GB2361713B (en) * 2000-04-14 2003-09-24 Fukuda Metal Foil Powder Method for surface treatment of copper foil
CN1299546C (zh) * 2000-10-26 2007-02-07 奥克一三井有限公司 在印刷电路板制造中利用对铜箔的金属化处理来产生细线条并替代氧化过程
US6763575B2 (en) * 2001-06-11 2004-07-20 Oak-Mitsui Inc. Printed circuit boards having integrated inductor cores
JP4062907B2 (ja) * 2001-11-12 2008-03-19 松下電器産業株式会社 回路基板およびその製造方法
JP3898077B2 (ja) * 2001-11-13 2007-03-28 株式会社フジクラ フレキシブルプリント配線板の製造方法
DE10246094A1 (de) † 2002-10-02 2004-04-22 Siemens Ag Stiftleiste
TW200500199A (en) 2003-02-12 2005-01-01 Furukawa Circuit Foil Copper foil for fine patterned printed circuits and method of production of same
JP4226927B2 (ja) * 2003-02-18 2009-02-18 三井金属鉱業株式会社 キャパシタ層形成用の両面銅張積層板の製造方法
JP4330979B2 (ja) * 2003-11-13 2009-09-16 福田金属箔粉工業株式会社 表面処理電解銅箔
JP3963907B2 (ja) * 2004-05-26 2007-08-22 三井金属鉱業株式会社 純銅被覆銅箔及びその製造方法、並びにｔａｂテープ及びその製造方法
JP2006005149A (ja) * 2004-06-17 2006-01-05 Furukawa Circuit Foil Kk 抵抗層付き導電性基材及び抵抗層付き回路基板材料
JP4298597B2 (ja) * 2004-07-01 2009-07-22 日東電工株式会社 配線回路基板および配線回路基板の製造方法
US6964884B1 (en) * 2004-11-19 2005-11-15 Endicott Interconnect Technologies, Inc. Circuitized substrates utilizing three smooth-sided conductive layers as part thereof, method of making same, and electrical assemblies and information handling systems utilizing same
US7307022B2 (en) * 2004-11-19 2007-12-11 Endicott Interconnect Technologies, Inc. Method of treating conductive layer for use in a circuitized substrate and method of making said substrate having said conductive layer as part thereof
US7383629B2 (en) * 2004-11-19 2008-06-10 Endicott Interconnect Technologies, Inc. Method of making circuitized substrates utilizing smooth-sided conductive layers as part thereof
KR100716815B1 (ko) * 2005-02-28 2007-05-09 삼성전기주식회사 칩 내장형 인쇄회로기판 및 그 제조방법
JP4771552B2 (ja) * 2005-10-05 2011-09-14 Ｊｘ日鉱日石金属株式会社 ２層フレキシブル基板
TW200738913A (en) * 2006-03-10 2007-10-16 Mitsui Mining & Smelting Co Surface treated elctrolytic copper foil and process for producing the same
US20070246158A1 (en) * 2006-04-21 2007-10-25 3M Innovative Properties Company Wiring board, production process thereof and connection method using same
JP4826569B2 (ja) * 2007-10-05 2011-11-30 日立電線株式会社 プリント配線板用金属板材およびその製造方法
JP5636224B2 (ja) * 2010-08-06 2014-12-03 三井金属鉱業株式会社 フィラー含有樹脂層付金属箔及びフィラー含有樹脂層付金属箔の製造方法
US20130284500A1 (en) * 2012-04-25 2013-10-31 Jun-Chung Hsu Laminate circuit board structure
CN104244586A (zh) * 2013-07-04 2014-12-24 漳州市福世通电子有限公司 一种卷式ic卡线路板铜箔与基材的固化方法
CN112867268A (zh) * 2021-01-05 2021-05-28 中山国昌荣电子有限公司 一种覆铜板减铜工艺

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3171756A (en) * 1961-05-04 1965-03-02 Ibm Method of making a printed circuit and base therefor
US3771973A (en) * 1971-05-10 1973-11-13 Hooker Chemical Corp Metal plating of synthetic polymers
US3984598A (en) * 1974-02-08 1976-10-05 Universal Oil Products Company Metal-clad laminates
US4191800A (en) * 1976-05-27 1980-03-04 Bell Telephone Laboratories, Incorporated Devices employing flexible substrates and method for making same
GB8333752D0 (en) * 1983-12-19 1984-01-25 Thorpe J E Matte surface on metal layer
AU579517B2 (en) * 1986-06-20 1988-11-24 Gould Inc. Double matte finish copper foil
US4886699A (en) * 1987-10-26 1989-12-12 Rogers Corporation Glass fiber reinforced fluoropolymeric circuit laminate
US4997516A (en) * 1989-07-10 1991-03-05 Edward Adler Method for improving adherence of copper foil to resinous substrates
TW208110B (de) * 1990-06-08 1993-06-21 Furukawa Circuit Foil Kk
JP3081026B2 (ja) * 1991-07-18 2000-08-28 古河サーキットフォイル株式会社 プリント配線板用電解銅箔
JPH0766933B2 (ja) * 1991-09-18 1995-07-19 三井金属鉱業株式会社 Ｔａｂテープの製造方法

Also Published As

Publication number Publication date
MY108905A (en) 1996-11-30
JP2762386B2 (ja) 1998-06-04
KR0127665B1 (ko) 1997-12-30
EP0616489B1 (de) 1997-07-09
DE69312049D1 (de) 1997-08-14
KR950007618A (ko) 1995-03-21
US5437914A (en) 1995-08-01
EP0616489A1 (de) 1994-09-21
ES2105046T3 (es) 1997-10-16
ATE155311T1 (de) 1997-07-15
SG46186A1 (en) 1998-02-20
JPH06270331A (ja) 1994-09-27
TW232120B (de) 1994-10-11

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Legal Events

Date Code Title Description
8363 Opposition against the patent
8328 Change in the person/name/address of the agent

Free format text: DERZEIT KEIN VERTRETER BESTELLT

8331 Complete revocation