DE69222087D1 - Programmierungsverfahren für Speicheranordnungen mit schwebendem Gate. - Google Patents

Programmierungsverfahren für Speicheranordnungen mit schwebendem Gate.

Info

Publication number
DE69222087D1
DE69222087D1 DE69222087T DE69222087T DE69222087D1 DE 69222087 D1 DE69222087 D1 DE 69222087D1 DE 69222087 T DE69222087 T DE 69222087T DE 69222087 T DE69222087 T DE 69222087T DE 69222087 D1 DE69222087 D1 DE 69222087D1
Authority
DE
Germany
Prior art keywords
floating gate
memory arrays
programming method
gate memory
programming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69222087T
Other languages
English (en)
Inventor
Kevin Alan Norman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Altera Corp
Original Assignee
Altera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Altera Corp filed Critical Altera Corp
Application granted granted Critical
Publication of DE69222087D1 publication Critical patent/DE69222087D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
DE69222087T 1991-05-31 1992-05-06 Programmierungsverfahren für Speicheranordnungen mit schwebendem Gate. Expired - Lifetime DE69222087D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/708,241 US5247477A (en) 1991-05-31 1991-05-31 Method of programming floating gate memory devices aided by potential applied to read channel

Publications (1)

Publication Number Publication Date
DE69222087D1 true DE69222087D1 (de) 1997-10-16

Family

ID=24844973

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69222087T Expired - Lifetime DE69222087D1 (de) 1991-05-31 1992-05-06 Programmierungsverfahren für Speicheranordnungen mit schwebendem Gate.

Country Status (4)

Country Link
US (1) US5247477A (de)
EP (1) EP0516296B1 (de)
JP (1) JPH0652692A (de)
DE (1) DE69222087D1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2829156B2 (ja) * 1991-07-25 1998-11-25 株式会社東芝 不揮発性半導体記憶装置の冗長回路
US5349220A (en) * 1993-08-10 1994-09-20 United Microelectronics Corporation Flash memory cell and its operation
US5909049A (en) 1997-02-11 1999-06-01 Actel Corporation Antifuse programmed PROM cell
US6125059A (en) * 1999-05-14 2000-09-26 Gatefield Corporation Method for erasing nonvolatile memory cells in a field programmable gate array
JP2008257804A (ja) * 2007-04-05 2008-10-23 Renesas Technology Corp 半導体装置
US8384147B2 (en) * 2011-04-29 2013-02-26 Silicon Storage Technology, Inc. High endurance non-volatile memory cell and array

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4412310A (en) * 1980-10-14 1983-10-25 Intel Corporation EPROM Cell with reduced programming voltage and method of fabrication
US4663740A (en) * 1985-07-01 1987-05-05 Silicon Macrosystems Incorporated High speed eprom cell and array
FR2622038B1 (fr) * 1987-10-19 1990-01-19 Thomson Semiconducteurs Procede de programmation des cellules memoire d'une memoire et circuit pour la mise en oeuvre de ce procede
JP2580752B2 (ja) * 1988-12-27 1997-02-12 日本電気株式会社 不揮発性半導体記憶装置
US5132935A (en) * 1990-04-16 1992-07-21 Ashmore Jr Benjamin H Erasure of eeprom memory arrays to prevent over-erased cells
US5122985A (en) * 1990-04-16 1992-06-16 Giovani Santin Circuit and method for erasing eeprom memory arrays to prevent over-erased cells
US5150179A (en) * 1990-07-05 1992-09-22 Texas Instruments Incorporated Diffusionless source/drain conductor electrically-erasable, electrically-programmable read-only memory and method for making and using the same

Also Published As

Publication number Publication date
EP0516296A2 (de) 1992-12-02
US5247477A (en) 1993-09-21
EP0516296B1 (de) 1997-09-10
JPH0652692A (ja) 1994-02-25
EP0516296A3 (en) 1993-10-06

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Legal Events

Date Code Title Description
8332 No legal effect for de