DE3177270D1 - Halbleiterspeicher mit datenprogrammierzeit. - Google Patents

Halbleiterspeicher mit datenprogrammierzeit.

Info

Publication number
DE3177270D1
DE3177270D1 DE8686201618T DE3177270T DE3177270D1 DE 3177270 D1 DE3177270 D1 DE 3177270D1 DE 8686201618 T DE8686201618 T DE 8686201618T DE 3177270 T DE3177270 T DE 3177270T DE 3177270 D1 DE3177270 D1 DE 3177270D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
programming time
data programming
data
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686201618T
Other languages
English (en)
Inventor
Hiroshi Iwahashi
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP14394880A external-priority patent/JPS5769584A/ja
Priority claimed from JP55143949A external-priority patent/JPS6014440B2/ja
Priority claimed from JP14394780A external-priority patent/JPS5769583A/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3177270D1 publication Critical patent/DE3177270D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/30—Accessing single arrays
    • G11C29/34—Accessing multiple bits simultaneously
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/32—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
DE8686201618T 1980-10-15 1981-10-07 Halbleiterspeicher mit datenprogrammierzeit. Expired - Lifetime DE3177270D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP14394880A JPS5769584A (en) 1980-10-15 1980-10-15 Non-volatile semiconductor memory
JP55143949A JPS6014440B2 (ja) 1980-10-15 1980-10-15 不揮発性半導体メモリ−
JP14394780A JPS5769583A (en) 1980-10-15 1980-10-15 Non_volatile semiconductor memory

Publications (1)

Publication Number Publication Date
DE3177270D1 true DE3177270D1 (de) 1992-02-27

Family

ID=27318741

Family Applications (2)

Application Number Title Priority Date Filing Date
DE8686201618T Expired - Lifetime DE3177270D1 (de) 1980-10-15 1981-10-07 Halbleiterspeicher mit datenprogrammierzeit.
DE8181304660T Expired DE3176751D1 (en) 1980-10-15 1981-10-07 Semiconductor memory with improved data programming time

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8181304660T Expired DE3176751D1 (en) 1980-10-15 1981-10-07 Semiconductor memory with improved data programming time

Country Status (3)

Country Link
US (1) US4477884A (de)
EP (1) EP0050005B1 (de)
DE (2) DE3177270D1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4566080A (en) * 1983-07-11 1986-01-21 Signetics Corporation Byte wide EEPROM with individual write circuits
US4578777A (en) * 1983-07-11 1986-03-25 Signetics Corporation One step write circuit arrangement for EEPROMS
US4599707A (en) * 1984-03-01 1986-07-08 Signetics Corporation Byte wide EEPROM with individual write circuits and write prevention means
JPS6177199A (ja) * 1984-09-21 1986-04-19 Toshiba Corp 半導体記憶装置
US4618784A (en) * 1985-01-28 1986-10-21 International Business Machines Corporation High-performance, high-density CMOS decoder/driver circuit
US4617477A (en) * 1985-05-21 1986-10-14 At&T Bell Laboratories Symmetrical output complementary buffer
JPS6240698A (ja) * 1985-08-16 1987-02-21 Fujitsu Ltd 半導体記憶装置
JPS62114200A (ja) * 1985-11-13 1987-05-25 Mitsubishi Electric Corp 半導体メモリ装置
US4725743A (en) * 1986-04-25 1988-02-16 International Business Machines Corporation Two-stage digital logic circuits including an input switching stage and an output driving stage incorporating gallium arsenide FET devices
US5050124A (en) * 1986-09-30 1991-09-17 Kabushiki Kaisha Toshiba Semiconductor memory having load transistor circuit
FR2605447B1 (fr) * 1986-10-20 1988-12-09 Eurotechnique Sa Memoire non volatile programmable electriquement
DE3884820T2 (de) * 1987-07-29 1994-01-27 Toshiba Kawasaki Kk Nichtflüchtige Halbleiterspeichereinrichtung.
JP2830066B2 (ja) * 1989-05-25 1998-12-02 ソニー株式会社 半導体メモリ
US5065364A (en) * 1989-09-15 1991-11-12 Intel Corporation Apparatus for providing block erasing in a flash EPROM
FR2665793B1 (fr) * 1990-08-10 1993-06-18 Sgs Thomson Microelectronics Circuit integre de memoire avec redondance et adressage ameliore en mode de test.
US5466117A (en) * 1993-06-10 1995-11-14 Xilinx, Inc. Device and method for programming multiple arrays of semiconductor devices
JP3432548B2 (ja) * 1993-07-26 2003-08-04 株式会社日立製作所 半導体記憶装置
US5392248A (en) * 1993-10-26 1995-02-21 Texas Instruments Incorporated Circuit and method for detecting column-line shorts in integrated-circuit memories
AU754666B2 (en) * 1995-03-13 2002-11-21 Riviera Homes Pty Ltd Apparatus for and method of securing trailed vehicles
US6134144A (en) * 1997-09-19 2000-10-17 Integrated Memory Technologies, Inc. Flash memory array
KR100505709B1 (ko) * 2003-09-08 2005-08-03 삼성전자주식회사 상 변화 메모리 장치의 파이어링 방법 및 효율적인파이어링을 수행할 수 있는 상 변화 메모리 장치
US7272070B2 (en) * 2004-12-21 2007-09-18 Infineon Technologies Ag Memory access using multiple activated memory cell rows

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52130536A (en) * 1976-04-26 1977-11-01 Toshiba Corp Semiconductor memory unit
US4079462A (en) * 1976-05-07 1978-03-14 Intel Corporation Refreshing apparatus for MOS dynamic RAMs
JPS5320825A (en) * 1976-08-11 1978-02-25 Hitachi Ltd Memory control system
US4301535A (en) * 1979-07-02 1981-11-17 Mostek Corporation Programmable read only memory integrated circuit with bit-check and deprogramming modes and methods for programming and testing said circuit

Also Published As

Publication number Publication date
US4477884A (en) 1984-10-16
EP0050005B1 (de) 1988-05-18
DE3176751D1 (en) 1988-06-23
EP0050005A2 (de) 1982-04-21
EP0050005A3 (en) 1983-08-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)