DE69221827T2 - Verfahren zum Programmieren einer anwenderprogrammierbaren Gattermatrix - Google Patents
Verfahren zum Programmieren einer anwenderprogrammierbaren GattermatrixInfo
- Publication number
- DE69221827T2 DE69221827T2 DE69221827T DE69221827T DE69221827T2 DE 69221827 T2 DE69221827 T2 DE 69221827T2 DE 69221827 T DE69221827 T DE 69221827T DE 69221827 T DE69221827 T DE 69221827T DE 69221827 T2 DE69221827 T2 DE 69221827T2
- Authority
- DE
- Germany
- Prior art keywords
- voltage
- voltage level
- memory cell
- sram
- level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 20
- 239000011159 matrix material Substances 0.000 title description 5
- 230000008672 reprogramming Effects 0.000 claims description 11
- 101150110971 CIN7 gene Proteins 0.000 claims description 6
- 101150110298 INV1 gene Proteins 0.000 claims description 6
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 claims description 6
- 101100286980 Daucus carota INV2 gene Proteins 0.000 claims description 5
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 claims description 5
- 230000000630 rising effect Effects 0.000 claims 5
- 239000004065 semiconductor Substances 0.000 description 5
- 230000007704 transition Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000000872 buffer Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Static Random-Access Memory (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/797,648 US5239510A (en) | 1991-11-25 | 1991-11-25 | Multiple voltage supplies for field programmable gate arrays and the like |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE69221827D1 DE69221827D1 (de) | 1997-10-02 |
| DE69221827T2 true DE69221827T2 (de) | 1998-01-02 |
Family
ID=25171434
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69221827T Expired - Fee Related DE69221827T2 (de) | 1991-11-25 | 1992-11-19 | Verfahren zum Programmieren einer anwenderprogrammierbaren Gattermatrix |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5239510A (enExample) |
| EP (1) | EP0544461B1 (enExample) |
| JP (1) | JP3355443B2 (enExample) |
| KR (1) | KR0171613B1 (enExample) |
| DE (1) | DE69221827T2 (enExample) |
| SG (1) | SG43685A1 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5512765A (en) * | 1994-02-03 | 1996-04-30 | National Semiconductor Corporation | Extendable circuit architecture |
| US5448525A (en) * | 1994-03-10 | 1995-09-05 | Intel Corporation | Apparatus for configuring a subset of an integrated circuit having boundary scan circuitry connected in series and a method thereof |
| JP3494469B2 (ja) * | 1994-05-26 | 2004-02-09 | 株式会社ルネサステクノロジ | フィールドプログラマブルゲートアレイ |
| US5525814A (en) * | 1995-01-19 | 1996-06-11 | Texas Instruments Incorporated | Three dimensional integrated latch and bulk pass transistor for high density field reconfigurable architecture |
| US5646544A (en) * | 1995-06-05 | 1997-07-08 | International Business Machines Corporation | System and method for dynamically reconfiguring a programmable gate array |
| US5970255A (en) | 1995-10-16 | 1999-10-19 | Altera Corporation | System for coupling programmable logic device to external circuitry which selects a logic standard and uses buffers to modify output and input signals accordingly |
| US6836151B1 (en) | 1999-03-24 | 2004-12-28 | Altera Corporation | I/O cell configuration for multiple I/O standards |
| US6271679B1 (en) | 1999-03-24 | 2001-08-07 | Altera Corporation | I/O cell configuration for multiple I/O standards |
| US7081875B2 (en) * | 2000-09-18 | 2006-07-25 | Sanyo Electric Co., Ltd. | Display device and its driving method |
| US6563339B2 (en) * | 2001-01-31 | 2003-05-13 | Micron Technology, Inc. | Multiple voltage supply switch |
| US6920076B2 (en) * | 2003-02-28 | 2005-07-19 | Union Semiconductor Technology Corporation | Interlayered power bus for semiconductor device |
| US6912171B2 (en) * | 2003-02-28 | 2005-06-28 | Union Semiconductor Technology Corporation | Semiconductor device power bus system and method |
| JP4147480B2 (ja) | 2003-07-07 | 2008-09-10 | ソニー株式会社 | データ転送回路及びフラットディスプレイ装置 |
| GB0414622D0 (en) * | 2004-06-30 | 2004-08-04 | Ibm | Data integrity checking in data storage devices |
| FR2877143A1 (fr) * | 2004-10-25 | 2006-04-28 | St Microelectronics Sa | Cellule de memoire volatile preenregistree |
| JP2012128816A (ja) * | 2010-12-17 | 2012-07-05 | Toshiba Corp | メモリシステム |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5577088A (en) * | 1978-12-07 | 1980-06-10 | Toshiba Corp | Nonvolatile semiconductor memory unit |
| US4271487A (en) * | 1979-11-13 | 1981-06-02 | Ncr Corporation | Static volatile/non-volatile ram cell |
| JPS581884A (ja) * | 1981-06-29 | 1983-01-07 | Fujitsu Ltd | スタティックｒａｍの電源供給方式 |
| US4821233A (en) * | 1985-09-19 | 1989-04-11 | Xilinx, Incorporated | 5-transistor memory cell with known state on power-up |
| US5065362A (en) * | 1989-06-02 | 1991-11-12 | Simtek Corporation | Non-volatile ram with integrated compact static ram load configuration |
-
1991
- 1991-11-25 US US07/797,648 patent/US5239510A/en not_active Expired - Lifetime
-
1992
- 1992-11-19 KR KR1019920021699A patent/KR0171613B1/ko not_active Expired - Fee Related
- 1992-11-19 SG SG1995002107A patent/SG43685A1/en unknown
- 1992-11-19 EP EP92310580A patent/EP0544461B1/en not_active Expired - Lifetime
- 1992-11-19 DE DE69221827T patent/DE69221827T2/de not_active Expired - Fee Related
- 1992-11-25 JP JP31386292A patent/JP3355443B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR0171613B1 (ko) | 1999-03-30 |
| EP0544461B1 (en) | 1997-08-27 |
| HK1001935A1 (en) | 1998-07-17 |
| SG43685A1 (en) | 1997-11-14 |
| JP3355443B2 (ja) | 2002-12-09 |
| EP0544461A3 (enExample) | 1994-02-02 |
| DE69221827D1 (de) | 1997-10-02 |
| EP0544461A2 (en) | 1993-06-02 |
| JPH05243973A (ja) | 1993-09-21 |
| KR930011436A (ko) | 1993-06-24 |
| US5239510A (en) | 1993-08-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition | ||
| 8327 | Change in the person/name/address of the patent owner |
Owner name: LATTICE SEMICONDUCTOR CORP., (N.D.GES.D. STAATES D |
|
| 8328 | Change in the person/name/address of the agent |
Free format text: PATENTANWAELTE VON KREISLER, SELTING, WERNER ET COL., 50667 KOELN |
|
| 8339 | Ceased/non-payment of the annual fee |