DE69221209T2 - Multiplexschaltung mit weniger Fehlerneigung - Google Patents

Multiplexschaltung mit weniger Fehlerneigung

Info

Publication number
DE69221209T2
DE69221209T2 DE69221209T DE69221209T DE69221209T2 DE 69221209 T2 DE69221209 T2 DE 69221209T2 DE 69221209 T DE69221209 T DE 69221209T DE 69221209 T DE69221209 T DE 69221209T DE 69221209 T2 DE69221209 T2 DE 69221209T2
Authority
DE
Germany
Prior art keywords
circuit
decoding
conductivity type
pass
circuit according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69221209T
Other languages
German (de)
English (en)
Other versions
DE69221209D1 (de
Inventor
Isao Abe
Tsutomu Takahashi
Shigeru Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69221209D1 publication Critical patent/DE69221209D1/de
Publication of DE69221209T2 publication Critical patent/DE69221209T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Logic Circuits (AREA)
DE69221209T 1991-05-20 1992-05-19 Multiplexschaltung mit weniger Fehlerneigung Expired - Fee Related DE69221209T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3114928A JP2977321B2 (ja) 1991-05-20 1991-05-20 マルチプレクサ

Publications (2)

Publication Number Publication Date
DE69221209D1 DE69221209D1 (de) 1997-09-04
DE69221209T2 true DE69221209T2 (de) 1998-01-02

Family

ID=14650135

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69221209T Expired - Fee Related DE69221209T2 (de) 1991-05-20 1992-05-19 Multiplexschaltung mit weniger Fehlerneigung

Country Status (5)

Country Link
US (1) US5327022A (cg-RX-API-DMAC7.html)
EP (1) EP0514845B1 (cg-RX-API-DMAC7.html)
JP (1) JP2977321B2 (cg-RX-API-DMAC7.html)
KR (1) KR970001417B1 (cg-RX-API-DMAC7.html)
DE (1) DE69221209T2 (cg-RX-API-DMAC7.html)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629812A (ja) * 1992-07-09 1994-02-04 Toshiba Corp 電位データ選択回路
US5438295A (en) * 1993-06-11 1995-08-01 Altera Corporation Look-up table using multi-level decode
JP3139892B2 (ja) * 1993-09-13 2001-03-05 株式会社東芝 データ選択回路
US5773995A (en) * 1996-04-22 1998-06-30 Motorola, Inc. Digital multiplexer circuit
JP3382886B2 (ja) 1999-06-03 2003-03-04 宮城日本電気株式会社 信号選択回路
US7409659B2 (en) * 2004-11-12 2008-08-05 Agere Systems Inc. System and method for suppressing crosstalk glitch in digital circuits
US7378879B1 (en) * 2005-06-20 2008-05-27 Lattice Semiconductor Corporation Decoding systems and methods
JP2008042343A (ja) * 2006-08-02 2008-02-21 Nec Electronics Corp スイッチ回路およびスイッチ装置
JP5713728B2 (ja) * 2010-04-01 2015-05-07 キヤノン株式会社 記録ヘッド

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4427978A (en) * 1981-08-31 1984-01-24 Marshall Williams Multiplexed liquid crystal display having a gray scale image
JPS5952497A (ja) * 1982-09-17 1984-03-27 Nec Corp デコ−ダ回路
JPS61131559A (ja) * 1984-11-30 1986-06-19 Toshiba Corp 半導体装置
US4598388A (en) * 1985-01-22 1986-07-01 Texas Instruments Incorporated Semiconductor memory with redundant column circuitry
US4642798A (en) * 1985-10-01 1987-02-10 Intel Corporation CMOS E2 PROM decoding circuit
JPH01135231A (ja) * 1987-11-20 1989-05-26 Fujitsu Ten Ltd 多チャンネルａ／ｄ変換器
JPH024011A (ja) * 1988-06-21 1990-01-09 Nec Corp アナログスイッチ回路
JP2663651B2 (ja) * 1989-06-26 1997-10-15 日本電気株式会社 半導体記憶集積回路
US5159215A (en) * 1990-02-26 1992-10-27 Nec Corporation Decoder circuit

Also Published As

Publication number Publication date
KR970001417B1 (ko) 1997-02-06
EP0514845A2 (en) 1992-11-25
KR920022561A (ko) 1992-12-19
JP2977321B2 (ja) 1999-11-15
US5327022A (en) 1994-07-05
JPH04343258A (ja) 1992-11-30
DE69221209D1 (de) 1997-09-04
EP0514845B1 (en) 1997-07-30
EP0514845A3 (cg-RX-API-DMAC7.html) 1995-02-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee