DE69218344D1 - Herstellungsverfahren für eine gedruckte Schaltung - Google Patents

Herstellungsverfahren für eine gedruckte Schaltung

Info

Publication number
DE69218344D1
DE69218344D1 DE69218344T DE69218344T DE69218344D1 DE 69218344 D1 DE69218344 D1 DE 69218344D1 DE 69218344 T DE69218344 T DE 69218344T DE 69218344 T DE69218344 T DE 69218344T DE 69218344 D1 DE69218344 D1 DE 69218344D1
Authority
DE
Germany
Prior art keywords
printed circuit
manufacturing process
printed
manufacturing
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69218344T
Other languages
English (en)
Other versions
DE69218344T2 (de
Inventor
Naoki Fukutomi
Hajime Nakayama
Yoshiaki Tsubomatsu
Kouichi Kaitou
Yasunobu Yoshidomi
Yoshihiro Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP31625291A external-priority patent/JP2586770B2/ja
Priority claimed from JP10467592A external-priority patent/JP3402372B2/ja
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Publication of DE69218344D1 publication Critical patent/DE69218344D1/de
Application granted granted Critical
Publication of DE69218344T2 publication Critical patent/DE69218344T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/428—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0361—Etched tri-metal structure, i.e. metal layers or metal patterns on both sides of a different central metal layer which is later at least partly etched
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09563—Metal filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
    • H05K2203/0152—Temporary metallic carrier, e.g. for transferring material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/025—Abrading, e.g. grinding or sand blasting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0376—Etching temporary metallic carrier substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0384—Etch stop layer, i.e. a buried barrier layer for preventing etching of layers under the etch stop layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0726—Electroforming, i.e. electroplating on a metallic carrier thereby forming a self-supporting structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4658—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern characterized by laminating a prefabricated metal foil pattern, e.g. by transfer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S29/00—Metal working
    • Y10S29/016—Method or apparatus with etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49158—Manufacturing circuit on or in base with molding of insulated base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
DE69218344T 1991-11-29 1992-11-28 Herstellungsverfahren für eine gedruckte Schaltung Expired - Fee Related DE69218344T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP31625291A JP2586770B2 (ja) 1991-11-29 1991-11-29 多層配線板の製造法
JP10467592A JP3402372B2 (ja) 1992-04-23 1992-04-23 配線板の製造法

Publications (2)

Publication Number Publication Date
DE69218344D1 true DE69218344D1 (de) 1997-04-24
DE69218344T2 DE69218344T2 (de) 1997-10-23

Family

ID=26445096

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69218344T Expired - Fee Related DE69218344T2 (de) 1991-11-29 1992-11-28 Herstellungsverfahren für eine gedruckte Schaltung

Country Status (4)

Country Link
US (2) US5426850A (de)
EP (1) EP0545328B1 (de)
KR (1) KR100274764B1 (de)
DE (1) DE69218344T2 (de)

Families Citing this family (70)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6568073B1 (en) 1991-11-29 2003-05-27 Hitachi Chemical Company, Ltd. Process for the fabrication of wiring board for electrical tests
US6133534A (en) * 1991-11-29 2000-10-17 Hitachi Chemical Company, Ltd. Wiring board for electrical tests with bumps having polymeric coating
DE69218344T2 (de) * 1991-11-29 1997-10-23 Hitachi Chemical Co., Ltd., Tokio/Tokyo Herstellungsverfahren für eine gedruckte Schaltung
US5600103A (en) * 1993-04-16 1997-02-04 Kabushiki Kaisha Toshiba Circuit devices and fabrication method of the same
JP2861841B2 (ja) * 1994-11-22 1999-02-24 ソニー株式会社 リードフレームの製造方法
JP3422144B2 (ja) * 1995-09-22 2003-06-30 ソニー株式会社 半導体パッケージの製造方法
US5826329A (en) * 1995-12-19 1998-10-27 Ncr Corporation Method of making printed circuit board using thermal transfer techniques
US5937512A (en) * 1996-01-11 1999-08-17 Micron Communications, Inc. Method of forming a circuit board
US6083837A (en) 1996-12-13 2000-07-04 Tessera, Inc. Fabrication of components by coining
US5786238A (en) * 1997-02-13 1998-07-28 Generyal Dynamics Information Systems, Inc. Laminated multilayer substrates
JP3971500B2 (ja) * 1998-02-20 2007-09-05 ソニー株式会社 半導体素子実装用配線基板の製造方法
TW585813B (en) * 1998-07-23 2004-05-01 Toyo Kohan Co Ltd Clad board for printed-circuit board, multi-layered printed-circuit board, and the fabrication method
US6140155A (en) * 1998-12-24 2000-10-31 Casio Computer Co., Ltd. Method of manufacturing semiconductor device using dry photoresist film
KR20000071383A (ko) 1999-02-26 2000-11-25 마쯔노고오지 배선층 전사용 복합재와 그 제조방법 및 장치
TW469758B (en) * 1999-05-06 2001-12-21 Mitsui Mining & Amp Smelting C Manufacturing method of double-sided printed circuit board and multi-layered printed circuit board with more than three layers
WO2000077850A1 (en) * 1999-06-10 2000-12-21 Toyo Kohan Co., Ltd. Clad plate for forming interposer for semiconductor device, interposer for semiconductor device, and method of manufacturing them
US6645359B1 (en) * 2000-10-06 2003-11-11 Roche Diagnostics Corporation Biosensor
US7073246B2 (en) * 1999-10-04 2006-07-11 Roche Diagnostics Operations, Inc. Method of making a biosensor
US6662439B1 (en) 1999-10-04 2003-12-16 Roche Diagnostics Corporation Laser defined features for patterned laminates and electrodes
TW512467B (en) 1999-10-12 2002-12-01 North Kk Wiring circuit substrate and manufacturing method therefor
US20020139668A1 (en) * 1999-11-03 2002-10-03 Raghbir Singh Bhullar Embedded metallic deposits
TWI243008B (en) * 1999-12-22 2005-11-01 Toyo Kohan Co Ltd Multi-layer printed circuit board and its manufacturing method
JP2001308095A (ja) * 2000-04-19 2001-11-02 Toyo Kohan Co Ltd 半導体装置およびその製造方法
US6540890B1 (en) * 2000-11-01 2003-04-01 Roche Diagnostics Corporation Biosensor
US7210223B2 (en) * 2000-12-13 2007-05-01 Image-Guided Neurologics, Inc. Method of manufacturing a microcoil construction
WO2002080639A1 (fr) * 2001-03-28 2002-10-10 North Corporation Panneau de cablage multicouche, procede permettant de le produire, polisseuse pour panneau de cablage multicouche et plaque de metal pour produire ledit panneau
US6779246B2 (en) * 2001-04-23 2004-08-24 Appleton Papers Inc. Method and system for forming RF reflective pathways
JP2002337268A (ja) * 2001-05-21 2002-11-27 Nitto Denko Corp 金属箔積層板及びその製造方法
US6815709B2 (en) * 2001-05-23 2004-11-09 International Business Machines Corporation Structure having flush circuitry features and method of making
US6663786B2 (en) * 2001-06-14 2003-12-16 International Business Machines Corporation Structure having embedded flush circuitry features and method of fabricating
US6814844B2 (en) 2001-08-29 2004-11-09 Roche Diagnostics Corporation Biosensor with code pattern
JP3793475B2 (ja) * 2002-03-18 2006-07-05 株式会社健正堂 精密金属部品の製造方法
US6866758B2 (en) * 2002-03-21 2005-03-15 Roche Diagnostics Corporation Biosensor
US6746823B2 (en) * 2002-06-01 2004-06-08 Industrial Technology Research Institute Fabricating process of non-gap 3-D microstructure array mold core
US6911400B2 (en) * 2002-11-05 2005-06-28 International Business Machines Corporation Nonlithographic method to produce self-aligned mask, articles produced by same and compositions for same
US6641899B1 (en) * 2002-11-05 2003-11-04 International Business Machines Corporation Nonlithographic method to produce masks by selective reaction, articles produced, and composition for same
TW200507218A (en) * 2003-03-31 2005-02-16 North Corp Layout circuit substrate, manufacturing method of layout circuit substrate, and circuit module
HUE039852T2 (hu) 2003-06-20 2019-02-28 Hoffmann La Roche Eljárás és reagens keskeny, homogén reagenscsíkok elõállítására
JP2005156522A (ja) * 2003-10-27 2005-06-16 Sumitomo Electric Ind Ltd コンタクトの製造方法とその方法により製造されたコンタクト
US7178229B2 (en) * 2003-11-20 2007-02-20 E. I. Du Pont De Nemours And Company Method of making interlayer panels
US7413670B2 (en) * 2004-06-25 2008-08-19 Mutual-Pak Technology Co., Ltd. Method for forming wiring on a substrate
KR20070068445A (ko) * 2004-10-06 2007-06-29 테세라 인터커넥트 머터리얼즈, 인크. 유전체의 표면에 매입된 금속 트레이스들을 갖는 상호접속소자를 제조하는 구조와 방법
JP4713131B2 (ja) * 2004-11-19 2011-06-29 株式会社マルチ プリント配線板及びそのプリント配線板の製造方法
WO2006079097A1 (en) * 2005-01-24 2006-07-27 Tessera Interconnect Materials, Inc. Structure and method of making interconnect element having metal traces embedded in suface of dielectric
GB0505826D0 (en) 2005-03-22 2005-04-27 Uni Microelektronica Ct Vsw Methods for embedding of conducting material and devices resulting from said methods
JP4619214B2 (ja) * 2005-07-04 2011-01-26 日東電工株式会社 配線回路基板
US20070102103A1 (en) * 2005-11-07 2007-05-10 Klaser Technology Inc. Manufacturing method for printing circuit
US7637009B2 (en) * 2006-02-27 2009-12-29 Sv Probe Pte. Ltd. Approach for fabricating probe elements for probe card assemblies using a reusable substrate
KR100779061B1 (ko) * 2006-10-24 2007-11-27 삼성전기주식회사 인쇄회로기판 및 그 제조방법
TWI347807B (en) * 2008-05-13 2011-08-21 Unimicron Technology Corp Electrically interconnect structure and process thereof and circuit board structure
EP2240005A1 (de) 2009-04-09 2010-10-13 ATOTECH Deutschland GmbH Verfahren zur Herstellung einer Schaltungsträgerschicht und Anwendung dieses Verfahrens zur Herstellung eines Schaltungsträgers
DE102009060480A1 (de) * 2009-12-18 2011-06-22 Schweizer Electronic AG, 78713 Leiterstrukturelement und Verfahren zum Herstellen eines Leiterstrukturelements
JP4896247B2 (ja) * 2010-04-23 2012-03-14 株式会社メイコー プリント基板の製造方法及びこれを用いたプリント基板
KR101221664B1 (ko) 2011-08-08 2013-01-14 삼성전기주식회사 인쇄회로기판 제조 방법
CN105282984B (zh) * 2012-01-17 2018-08-31 江苏普诺威电子股份有限公司 加成法凸台印制板制作工艺
KR20150014857A (ko) * 2013-07-30 2015-02-09 주식회사 엘지화학 열 융착 전사를 이용한 유연 매립형 전극 필름의 제조 방법
US9365947B2 (en) 2013-10-04 2016-06-14 Invensas Corporation Method for preparing low cost substrates
KR101465083B1 (ko) * 2013-10-14 2014-11-26 한국생산기술연구원 회로기판의 제조방법
KR101517553B1 (ko) * 2013-10-14 2015-05-04 한국생산기술연구원 회로기판의 제조방법
KR101537258B1 (ko) * 2014-05-15 2015-07-20 한국생산기술연구원 회로기판의 제조방법
JP6491556B2 (ja) * 2015-07-09 2019-03-27 日東電工株式会社 配線回路基板
JP6484133B2 (ja) * 2015-07-09 2019-03-13 日東電工株式会社 配線回路基板の製造方法
US9570227B1 (en) * 2015-07-27 2017-02-14 Kinsus Interconnect Technology Corp. Magnetic excitation coil structure
US20170033272A1 (en) * 2015-07-31 2017-02-02 Stmicroelectronics S.R.L. Method to make a flexible thermoelectric generator device and related devices
JP6738718B2 (ja) * 2016-11-30 2020-08-12 新光電気工業株式会社 配線基板の製造方法
CN107105578A (zh) * 2017-04-17 2017-08-29 复旦大学 一种制备双面和多层电路的电镀剥离工艺
CN108811354A (zh) * 2017-04-28 2018-11-13 鹏鼎控股(深圳)股份有限公司 电路板及其制作方法
KR102069659B1 (ko) * 2017-08-31 2020-01-23 해성디에스 주식회사 반도체 패키지 기판 제조방법 및 이를 이용하여 제조된 반도체 패키지 기판
TWI669994B (zh) * 2017-12-04 2019-08-21 希華晶體科技股份有限公司 Method for manufacturing miniaturized circuit and its products
CN110351955B (zh) * 2019-06-17 2021-07-23 江门崇达电路技术有限公司 一种具有局部电厚金pad的pcb的制作方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3324014A (en) * 1962-12-03 1967-06-06 United Carr Inc Method for making flush metallic patterns
US3391457A (en) * 1965-03-10 1968-07-09 Litton Systems Inc Shielded circuit conductor
US3677950A (en) * 1969-04-30 1972-07-18 Lee Alderuccio & Associates In Chemical etching solution for printed wiring boards
US4306925A (en) * 1977-01-11 1981-12-22 Pactel Corporation Method of manufacturing high density printed circuit
JPS5435670A (en) * 1977-08-25 1979-03-15 Seiko Instr & Electronics Ltd Electronic switch micro signal
US4374869A (en) * 1982-01-18 1983-02-22 Western Electric Company, Inc. Selective metal etch technique
US4606787A (en) * 1982-03-04 1986-08-19 Etd Technology, Inc. Method and apparatus for manufacturing multi layer printed circuit boards
GB8500906D0 (en) * 1985-01-15 1985-02-20 Prestwick Circuits Ltd Printed circuit boards
JPS62276894A (ja) * 1986-02-21 1987-12-01 株式会社メイコー スル−ホ−ル付導体回路板の製造方法
JPH0298139A (ja) * 1988-10-04 1990-04-10 Seiko Instr Inc 金バンプ形成方法
EP0370133A1 (de) * 1988-11-24 1990-05-30 Siemens Aktiengesellschaft Verfahren zur Herstellung von Leiterplatten
JPH02310941A (ja) * 1989-05-26 1990-12-26 Mitsui Mining & Smelting Co Ltd バンプを有するプリント回路基板およびバンプの形成方法
JPH0710030B2 (ja) * 1990-05-18 1995-02-01 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 多層配線基板の製造方法
JPH0636472B2 (ja) * 1990-05-28 1994-05-11 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 多層配線基板の製造方法
US5017271A (en) * 1990-08-24 1991-05-21 Gould Inc. Method for printed circuit board pattern making using selectively etchable metal layers
EP0529578B1 (de) * 1991-08-26 1996-01-31 Hughes Aircraft Company Semi-additive elektrische Schaltungen mit erhöhten Einzelheiten unter Verwendung geformter Matrizen
DE69218344T2 (de) * 1991-11-29 1997-10-23 Hitachi Chemical Co., Ltd., Tokio/Tokyo Herstellungsverfahren für eine gedruckte Schaltung

Also Published As

Publication number Publication date
EP0545328B1 (de) 1997-03-19
KR100274764B1 (ko) 2001-01-15
KR930011781A (ko) 1993-06-24
US5664325A (en) 1997-09-09
EP0545328A2 (de) 1993-06-09
EP0545328A3 (en) 1993-11-18
DE69218344T2 (de) 1997-10-23
US5426850A (en) 1995-06-27

Similar Documents

Publication Publication Date Title
DE69218344D1 (de) Herstellungsverfahren für eine gedruckte Schaltung
DE69113076D1 (de) Herstellungsverfahren für eine Karte.
DE69323340D1 (de) Randverbinder für eine Leiterplatte
DE69421658D1 (de) Auslegungsmethode für mehrlagige gedruckte Schaltung
DE69033522D1 (de) Gedruckte Schaltung
DE69102497D1 (de) Kühleinrichtung mit Perforationen für eine gedruckte Schaltkreisanordnung.
DE69210374D1 (de) Herstellungsverfahren für eine Magnetrolle
GB2234394B (en) A process for fabricating an integrated circuit
DE69120198D1 (de) Mehrschichtige, gedruckte Leiterplatte und Verfahren zu ihrer Herstellung
DE68914075D1 (de) Schutzschaltung für ein magnetoresistives Element.
DE69209169D1 (de) Verbindungstechnik für integrierte Schaltung
DE69109611D1 (de) Befestigungsvorrichtung für eine gedruckte Schaltplatine.
DE69027908D1 (de) Untersuchungsapparatur für eine gedruckte Schaltung
EP0478320A3 (en) Method for manufacturing printed circuit board
DE69117905D1 (de) Herstellungsverfahren für Alkoxyphthalocyanine
IT8520284A0 (it) Processo per la fabbricazione dipiastre a circuiti stampati, e prodotti relativi.
DE68921472D1 (de) Koaxialer steckverbinder für eine gedruckte schaltungsplatte.
DE69415092D1 (de) Lötfreie Steckverrieglung für eine Leiterplatte
NO176738C (no) Magnetkrets
DE69115619D1 (de) Leiterplatte und Verfahren zu ihrer Herstellung
DE59010608D1 (de) Schaltungsanordnung für einen Matrixdrucker
DE69228328D1 (de) Schneid-Stanzvorrichtung für eine Druckvorrichtung
DE69411464D1 (de) Plattenherstellungsverfahren für eine Schablone
DE69328343D1 (de) Übertrageplatine für eine Flachstrickmaschine
KR900007287A (ko) 인쇄회로 및 그 제조공정

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee