DE69421658D1 - Auslegungsmethode für mehrlagige gedruckte Schaltung - Google Patents
Auslegungsmethode für mehrlagige gedruckte SchaltungInfo
- Publication number
- DE69421658D1 DE69421658D1 DE69421658T DE69421658T DE69421658D1 DE 69421658 D1 DE69421658 D1 DE 69421658D1 DE 69421658 T DE69421658 T DE 69421658T DE 69421658 T DE69421658 T DE 69421658T DE 69421658 D1 DE69421658 D1 DE 69421658D1
- Authority
- DE
- Germany
- Prior art keywords
- printed circuit
- design method
- multilayer printed
- multilayer
- design
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/125,035 US5508938A (en) | 1992-08-13 | 1993-09-21 | Special interconnect layer employing offset trace layout for advanced multi-chip module packages |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69421658D1 true DE69421658D1 (de) | 1999-12-23 |
DE69421658T2 DE69421658T2 (de) | 2000-03-09 |
Family
ID=22417927
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69421658T Expired - Lifetime DE69421658T2 (de) | 1993-09-21 | 1994-08-23 | Auslegungsmethode für mehrlagige gedruckte Schaltung |
Country Status (4)
Country | Link |
---|---|
US (1) | US5508938A (de) |
EP (1) | EP0644596B1 (de) |
JP (1) | JP3238831B2 (de) |
DE (1) | DE69421658T2 (de) |
Families Citing this family (81)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2638567B2 (ja) * | 1995-06-08 | 1997-08-06 | 日本電気株式会社 | 多層配線基板 |
US5786630A (en) * | 1996-08-07 | 1998-07-28 | Intel Corporation | Multi-layer C4 flip-chip substrate |
US6307162B1 (en) | 1996-12-09 | 2001-10-23 | International Business Machines Corporation | Integrated circuit wiring |
US5987241A (en) * | 1997-01-09 | 1999-11-16 | Hewlett-Packard Company | Routing techniques to assure electrical integrity in datapath blocks |
US7336468B2 (en) | 1997-04-08 | 2008-02-26 | X2Y Attenuators, Llc | Arrangement for energy conditioning |
US7321485B2 (en) | 1997-04-08 | 2008-01-22 | X2Y Attenuators, Llc | Arrangement for energy conditioning |
US9054094B2 (en) | 1997-04-08 | 2015-06-09 | X2Y Attenuators, Llc | Energy conditioning circuit arrangement for integrated circuit |
US5874778A (en) * | 1997-06-11 | 1999-02-23 | International Business Machines Corporation | Embedded power and ground plane structure |
US6691296B1 (en) * | 1998-02-02 | 2004-02-10 | Matsushita Electric Industrial Co., Ltd. | Circuit board design aiding |
DE19835263C2 (de) * | 1998-08-04 | 2000-06-21 | Siemens Ag | Integrierte Schaltung mit durch Energieeinwirkung auftrennbaren elektrischen Verbindungstellen |
JP4363716B2 (ja) * | 1999-06-25 | 2009-11-11 | 株式会社東芝 | Lsiの配線構造の設計方法 |
US6392159B1 (en) | 1999-07-27 | 2002-05-21 | International Business Machines Corporation | Embedded structure for engineering change and repair of circuit boards |
DE10031658A1 (de) * | 2000-06-29 | 2002-01-17 | Siemens Ag | Substrat und Modul |
US6930256B1 (en) | 2002-05-01 | 2005-08-16 | Amkor Technology, Inc. | Integrated circuit substrate having laser-embedded conductive patterns and method therefor |
US7334326B1 (en) | 2001-06-19 | 2008-02-26 | Amkor Technology, Inc. | Method for making an integrated circuit substrate having embedded passive components |
US6987661B1 (en) | 2001-06-19 | 2006-01-17 | Amkor Technology, Inc. | Integrated circuit substrate having embedded passive components and methods therefor |
US6831371B1 (en) | 2002-03-16 | 2004-12-14 | Amkor Technology, Inc. | Integrated circuit substrate having embedded wire conductors and method therefor |
US20080043447A1 (en) * | 2002-05-01 | 2008-02-21 | Amkor Technology, Inc. | Semiconductor package having laser-embedded terminals |
US6930257B1 (en) | 2002-05-01 | 2005-08-16 | Amkor Technology, Inc. | Integrated circuit substrate having laminated laser-embedded circuit layers |
US7633765B1 (en) | 2004-03-23 | 2009-12-15 | Amkor Technology, Inc. | Semiconductor package including a top-surface metal layer for implementing circuit features |
US9691635B1 (en) | 2002-05-01 | 2017-06-27 | Amkor Technology, Inc. | Buildup dielectric layer having metallization pattern semiconductor package fabrication method |
US7670962B2 (en) | 2002-05-01 | 2010-03-02 | Amkor Technology, Inc. | Substrate having stiffener fabrication method |
US7399661B2 (en) * | 2002-05-01 | 2008-07-15 | Amkor Technology, Inc. | Method for making an integrated circuit substrate having embedded back-side access conductors and vias |
US7028400B1 (en) | 2002-05-01 | 2006-04-18 | Amkor Technology, Inc. | Integrated circuit substrate having laser-exposed terminals |
US7548430B1 (en) | 2002-05-01 | 2009-06-16 | Amkor Technology, Inc. | Buildup dielectric and metallization process and semiconductor package |
US7080339B2 (en) * | 2003-05-07 | 2006-07-18 | Cadence Design Systems, Inc. | Plane representation of wiring in a design layout |
US7243328B2 (en) * | 2003-05-07 | 2007-07-10 | Cadence Design Systems, Inc. | Method and apparatus for representing items in a design layout |
US7065731B2 (en) * | 2003-05-07 | 2006-06-20 | Cadence Design Systems, Inc. | Removal of acute angles in a design layout |
US10811277B2 (en) | 2004-03-23 | 2020-10-20 | Amkor Technology, Inc. | Encapsulated semiconductor package |
US11081370B2 (en) | 2004-03-23 | 2021-08-03 | Amkor Technology Singapore Holding Pte. Ltd. | Methods of manufacturing an encapsulated semiconductor device |
US7145238B1 (en) | 2004-05-05 | 2006-12-05 | Amkor Technology, Inc. | Semiconductor package and substrate having multi-level vias |
TWI237380B (en) * | 2004-11-19 | 2005-08-01 | Advanced Semiconductor Eng | Build-up via for suppressing simultaneous switching noise |
JP2008537843A (ja) | 2005-03-01 | 2008-09-25 | エックストゥーワイ アテニュエイターズ,エルエルシー | 内部で重なり合った調整器 |
US7571408B1 (en) | 2005-03-09 | 2009-08-04 | Cadence Design Systems, Inc. | Methods and apparatus for diagonal route shielding |
US7348667B2 (en) * | 2005-03-22 | 2008-03-25 | International Business Machines Corporation | System and method for noise reduction in multi-layer ceramic packages |
US7307437B1 (en) * | 2005-03-24 | 2007-12-11 | Hewlett-Packard Development Company, L.P. | Arrangement with conductive pad embedment |
US8826531B1 (en) | 2005-04-05 | 2014-09-09 | Amkor Technology, Inc. | Method for making an integrated circuit substrate having laminated laser-embedded circuit layers |
US7430800B2 (en) * | 2005-06-06 | 2008-10-07 | International Business Machines Corporation | Apparatus and method for far end noise reduction using capacitive cancellation by offset wiring |
US7694258B1 (en) | 2005-08-01 | 2010-04-06 | Cadence Design Systems, Inc. | Method and apparatus for inserting metal fill in an integrated circuit (“IC”) layout |
US7589398B1 (en) | 2006-10-04 | 2009-09-15 | Amkor Technology, Inc. | Embedded metal features structure |
US7550857B1 (en) | 2006-11-16 | 2009-06-23 | Amkor Technology, Inc. | Stacked redistribution layer (RDL) die assembly package |
US7750250B1 (en) | 2006-12-22 | 2010-07-06 | Amkor Technology, Inc. | Blind via capture pad structure |
US7608538B2 (en) * | 2007-01-05 | 2009-10-27 | International Business Machines Corporation | Formation of vertical devices by electroplating |
US7752752B1 (en) | 2007-01-09 | 2010-07-13 | Amkor Technology, Inc. | Method of fabricating an embedded circuit pattern |
US8018052B2 (en) * | 2007-06-29 | 2011-09-13 | Stats Chippac Ltd. | Integrated circuit package system with side substrate having a top layer |
US8323771B1 (en) | 2007-08-15 | 2012-12-04 | Amkor Technology, Inc. | Straight conductor blind via capture pad structure and fabrication method |
CN101257788B (zh) * | 2007-12-07 | 2010-07-14 | 深圳创维-Rgb电子有限公司 | 一种在pcb板上自动插件的方法、系统及设备 |
US8872329B1 (en) | 2009-01-09 | 2014-10-28 | Amkor Technology, Inc. | Extended landing pad substrate package structure and method |
US7960827B1 (en) | 2009-04-09 | 2011-06-14 | Amkor Technology, Inc. | Thermal via heat spreader package and method |
US8623753B1 (en) | 2009-05-28 | 2014-01-07 | Amkor Technology, Inc. | Stackable protruding via package and method |
US8222538B1 (en) | 2009-06-12 | 2012-07-17 | Amkor Technology, Inc. | Stackable via package and method |
US8471154B1 (en) | 2009-08-06 | 2013-06-25 | Amkor Technology, Inc. | Stackable variable height via package and method |
US8796561B1 (en) | 2009-10-05 | 2014-08-05 | Amkor Technology, Inc. | Fan out build up substrate stackable package and method |
US8288657B2 (en) * | 2009-10-12 | 2012-10-16 | International Business Machines Corporation | Noise coupling reduction and impedance discontinuity control in high-speed ceramic modules |
US8937381B1 (en) | 2009-12-03 | 2015-01-20 | Amkor Technology, Inc. | Thin stackable package and method |
US9691734B1 (en) | 2009-12-07 | 2017-06-27 | Amkor Technology, Inc. | Method of forming a plurality of electronic component packages |
US8536462B1 (en) | 2010-01-22 | 2013-09-17 | Amkor Technology, Inc. | Flex circuit package and method |
JP5486376B2 (ja) * | 2010-03-31 | 2014-05-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US8300423B1 (en) | 2010-05-25 | 2012-10-30 | Amkor Technology, Inc. | Stackable treated via package and method |
US8294276B1 (en) | 2010-05-27 | 2012-10-23 | Amkor Technology, Inc. | Semiconductor device and fabricating method thereof |
US8338229B1 (en) | 2010-07-30 | 2012-12-25 | Amkor Technology, Inc. | Stackable plasma cleaned via package and method |
US8717775B1 (en) | 2010-08-02 | 2014-05-06 | Amkor Technology, Inc. | Fingerprint sensor package and method |
US8337657B1 (en) | 2010-10-27 | 2012-12-25 | Amkor Technology, Inc. | Mechanical tape separation package and method |
US8482134B1 (en) | 2010-11-01 | 2013-07-09 | Amkor Technology, Inc. | Stackable package and method |
US9748154B1 (en) | 2010-11-04 | 2017-08-29 | Amkor Technology, Inc. | Wafer level fan out semiconductor device and manufacturing method thereof |
US8525318B1 (en) | 2010-11-10 | 2013-09-03 | Amkor Technology, Inc. | Semiconductor device and fabricating method thereof |
US8557629B1 (en) | 2010-12-03 | 2013-10-15 | Amkor Technology, Inc. | Semiconductor device having overlapped via apertures |
US8535961B1 (en) | 2010-12-09 | 2013-09-17 | Amkor Technology, Inc. | Light emitting diode (LED) package and method |
US9721872B1 (en) | 2011-02-18 | 2017-08-01 | Amkor Technology, Inc. | Methods and structures for increasing the allowable die size in TMV packages |
US9013011B1 (en) | 2011-03-11 | 2015-04-21 | Amkor Technology, Inc. | Stacked and staggered die MEMS package and method |
KR101140113B1 (ko) | 2011-04-26 | 2012-04-30 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 |
US8653674B1 (en) | 2011-09-15 | 2014-02-18 | Amkor Technology, Inc. | Electronic component package fabrication method and structure |
US8633598B1 (en) | 2011-09-20 | 2014-01-21 | Amkor Technology, Inc. | Underfill contacting stacking balls package fabrication method and structure |
US9029962B1 (en) | 2011-10-12 | 2015-05-12 | Amkor Technology, Inc. | Molded cavity substrate MEMS package fabrication method and structure |
KR101366461B1 (ko) | 2012-11-20 | 2014-02-26 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
US9799592B2 (en) | 2013-11-19 | 2017-10-24 | Amkor Technology, Inc. | Semicondutor device with through-silicon via-less deep wells |
KR101488590B1 (ko) | 2013-03-29 | 2015-01-30 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
US9331016B2 (en) | 2013-07-25 | 2016-05-03 | Qualcomm Incorporated | SOC design with critical technology pitch alignment |
KR101607981B1 (ko) | 2013-11-04 | 2016-03-31 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지용 인터포저 및 이의 제조 방법, 제조된 인터포저를 이용한 반도체 패키지 |
US9960328B2 (en) | 2016-09-06 | 2018-05-01 | Amkor Technology, Inc. | Semiconductor device and manufacturing method thereof |
DE102019212785A1 (de) * | 2019-08-27 | 2021-03-04 | Robert Bosch Gmbh | Verfahren und Vorrichtung zur Analyse eines Erzeugnisses |
Family Cites Families (30)
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US4210885A (en) * | 1978-06-30 | 1980-07-01 | International Business Machines Corporation | Thin film lossy line for preventing reflections in microcircuit chip package interconnections |
US4245273A (en) * | 1979-06-29 | 1981-01-13 | International Business Machines Corporation | Package for mounting and interconnecting a plurality of large scale integrated semiconductor devices |
DE2940593A1 (de) * | 1979-10-06 | 1981-04-16 | Ibm Deutschland Gmbh, 7000 Stuttgart | Mehrlagen-modul mit konstantem wellenwiderstand |
JPS58124260A (ja) * | 1982-01-20 | 1983-07-23 | Nec Corp | 配線基板 |
US4553111A (en) * | 1983-08-30 | 1985-11-12 | Burroughs Corporation | Printed circuit board maximizing areas for component utilization |
US4560962A (en) * | 1983-08-30 | 1985-12-24 | Burroughs Corporation | Multilayered printed circuit board with controlled 100 ohm impedance |
US4754371A (en) * | 1984-04-27 | 1988-06-28 | Nec Corporation | Large scale integrated circuit package |
US4535388A (en) * | 1984-06-29 | 1985-08-13 | International Business Machines Corporation | High density wired module |
FR2567684B1 (fr) * | 1984-07-10 | 1988-11-04 | Nec Corp | Module ayant un substrat ceramique multicouche et un circuit multicouche sur ce substrat et procede pour sa fabrication |
EP0257119B1 (de) * | 1986-08-22 | 1991-02-20 | Ibm Deutschland Gmbh | Integriertes Verdrahtungssystem für sehr hochintegrierte Schaltungen |
US4811082A (en) * | 1986-11-12 | 1989-03-07 | International Business Machines Corporation | High performance integrated circuit packaging structure |
JPS63245952A (ja) * | 1987-04-01 | 1988-10-13 | Hitachi Ltd | マルチチップモジュ−ル構造体 |
JP2606845B2 (ja) * | 1987-06-19 | 1997-05-07 | 富士通株式会社 | 半導体集積回路 |
US5165166A (en) * | 1987-09-29 | 1992-11-24 | Microelectronics And Computer Technology Corporation | Method of making a customizable circuitry |
US4859806A (en) * | 1988-05-17 | 1989-08-22 | Microelectronics And Computer Technology Corporation | Discretionary interconnect |
JPH0229124A (ja) * | 1988-07-19 | 1990-01-31 | Toshiba Corp | スタンダードセル |
JP2668981B2 (ja) * | 1988-09-19 | 1997-10-27 | 富士通株式会社 | 半導体集積回路 |
JPH02106968A (ja) * | 1988-10-17 | 1990-04-19 | Hitachi Ltd | 半導体集積回路装置及びその形成方法 |
JPH0731695B2 (ja) * | 1988-10-26 | 1995-04-10 | 三菱電機株式会社 | 半導体集積回路装置のマスクパターンのコンパクション処理方法 |
EP0393635B1 (de) * | 1989-04-21 | 1997-09-03 | Nec Corporation | Halbleiteranordnung mit Mehrschichtleiter |
JP3090453B2 (ja) * | 1989-07-10 | 2000-09-18 | 株式会社日立製作所 | 厚膜薄膜積層基板およびそれを用いた電子回路装置 |
US5061824A (en) * | 1989-08-23 | 1991-10-29 | Ncr Corporation | Backpanel having multiple logic family signal layers |
US5377124A (en) * | 1989-09-20 | 1994-12-27 | Aptix Corporation | Field programmable printed circuit board |
US5127986A (en) * | 1989-12-01 | 1992-07-07 | Cray Research, Inc. | High power, high density interconnect method and apparatus for integrated circuits |
US5060116A (en) * | 1990-04-20 | 1991-10-22 | Grobman Warren D | Electronics system with direct write engineering change capability |
US5081563A (en) * | 1990-04-27 | 1992-01-14 | International Business Machines Corporation | Multi-layer package incorporating a recessed cavity for a semiconductor chip |
US5045819A (en) * | 1990-06-06 | 1991-09-03 | Arizona Board Of Regents, A Body Corporate Acting On Behalf Of Arizona State University | Multilayer-multiconductor microstrips for digital integrated circuits |
US5068631A (en) * | 1990-08-09 | 1991-11-26 | At&T Bell Laboratories | Sub power plane to provide EMC filtering for VLSI devices |
JP2825031B2 (ja) * | 1991-08-06 | 1998-11-18 | 日本電気株式会社 | 半導体メモリ装置 |
JPH07123150B2 (ja) * | 1992-03-06 | 1995-12-25 | インターナショナル・ビジネス・マシーンズ・コーポレイション | ハイブリッド半導体モジュール |
-
1993
- 1993-09-21 US US08/125,035 patent/US5508938A/en not_active Expired - Lifetime
-
1994
- 1994-08-23 EP EP94113128A patent/EP0644596B1/de not_active Expired - Lifetime
- 1994-08-23 DE DE69421658T patent/DE69421658T2/de not_active Expired - Lifetime
- 1994-09-19 JP JP22312694A patent/JP3238831B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0644596B1 (de) | 1999-11-17 |
EP0644596A1 (de) | 1995-03-22 |
JPH07152823A (ja) | 1995-06-16 |
US5508938A (en) | 1996-04-16 |
DE69421658T2 (de) | 2000-03-09 |
JP3238831B2 (ja) | 2001-12-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE |