DE69211608D1 - Herstellungsmethode für Halbleiterspeicher - Google Patents

Herstellungsmethode für Halbleiterspeicher

Info

Publication number
DE69211608D1
DE69211608D1 DE69211608T DE69211608T DE69211608D1 DE 69211608 D1 DE69211608 D1 DE 69211608D1 DE 69211608 T DE69211608 T DE 69211608T DE 69211608 T DE69211608 T DE 69211608T DE 69211608 D1 DE69211608 D1 DE 69211608D1
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69211608T
Other languages
English (en)
Other versions
DE69211608T2 (de
Inventor
Hideaki Kuroda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of DE69211608D1 publication Critical patent/DE69211608D1/de
Publication of DE69211608T2 publication Critical patent/DE69211608T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/97—Specified etch stop material
DE69211608T 1991-04-30 1992-04-28 Herstellungsmethode für Halbleiterspeicher Expired - Fee Related DE69211608T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03126889A JP3079637B2 (ja) 1991-04-30 1991-04-30 半導体メモリの製造方法

Publications (2)

Publication Number Publication Date
DE69211608D1 true DE69211608D1 (de) 1996-07-25
DE69211608T2 DE69211608T2 (de) 1997-02-13

Family

ID=14946369

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69211608T Expired - Fee Related DE69211608T2 (de) 1991-04-30 1992-04-28 Herstellungsmethode für Halbleiterspeicher

Country Status (5)

Country Link
US (1) US5346843A (de)
EP (1) EP0511631B1 (de)
JP (1) JP3079637B2 (de)
KR (1) KR920020719A (de)
DE (1) DE69211608T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01230081A (ja) * 1988-03-10 1989-09-13 Nec Corp 現像装置
JP2757733B2 (ja) * 1992-03-25 1998-05-25 松下電器産業株式会社 半導体装置の製造方法
JP2643870B2 (ja) * 1994-11-29 1997-08-20 日本電気株式会社 半導体記憶装置の製造方法
JP6408372B2 (ja) * 2014-03-31 2018-10-17 ソニーセミコンダクタソリューションズ株式会社 固体撮像装置及びその駆動制御方法、並びに、電子機器
KR102327744B1 (ko) 2020-03-31 2021-11-17 김형중 개봉이 편리한 밀봉테이프가 부착된 포장상자

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60153158A (ja) * 1984-01-23 1985-08-12 Oki Electric Ind Co Ltd キャパシタ誘電体膜の製造方法
JPH0666437B2 (ja) * 1987-11-17 1994-08-24 富士通株式会社 半導体記憶装置及びその製造方法
JPH0221652A (ja) * 1988-07-08 1990-01-24 Mitsubishi Electric Corp 半導体記憶装置
US5043780A (en) * 1990-01-03 1991-08-27 Micron Technology, Inc. DRAM cell having a texturized polysilicon lower capacitor plate for increased capacitance
JP2519569B2 (ja) * 1990-04-27 1996-07-31 三菱電機株式会社 半導体記憶装置およびその製造方法

Also Published As

Publication number Publication date
EP0511631B1 (de) 1996-06-19
DE69211608T2 (de) 1997-02-13
EP0511631A1 (de) 1992-11-04
US5346843A (en) 1994-09-13
JPH04329668A (ja) 1992-11-18
JP3079637B2 (ja) 2000-08-21
KR920020719A (ko) 1992-11-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee