DE69130248D1 - Herstellungsverfahren für einen Halbleiterspeicher - Google Patents

Herstellungsverfahren für einen Halbleiterspeicher

Info

Publication number
DE69130248D1
DE69130248D1 DE69130248T DE69130248T DE69130248D1 DE 69130248 D1 DE69130248 D1 DE 69130248D1 DE 69130248 T DE69130248 T DE 69130248T DE 69130248 T DE69130248 T DE 69130248T DE 69130248 D1 DE69130248 D1 DE 69130248D1
Authority
DE
Germany
Prior art keywords
manufacturing process
semiconductor memory
semiconductor
memory
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69130248T
Other languages
English (en)
Other versions
DE69130248T2 (de
Inventor
Kazuhiro Tasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69130248D1 publication Critical patent/DE69130248D1/de
Publication of DE69130248T2 publication Critical patent/DE69130248T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/38—Doping programmed, e.g. mask ROM
    • H10B20/383—Channel doping programmed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/60—Peripheral circuit regions
    • H10B20/65—Peripheral circuit regions of memory structures of the ROM only type
DE69130248T 1990-10-30 1991-10-30 Herstellungsverfahren für einen Halbleiterspeicher Expired - Fee Related DE69130248T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2292884A JP2913817B2 (ja) 1990-10-30 1990-10-30 半導体メモリの製造方法

Publications (2)

Publication Number Publication Date
DE69130248D1 true DE69130248D1 (de) 1998-10-29
DE69130248T2 DE69130248T2 (de) 1999-04-29

Family

ID=17787628

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69130248T Expired - Fee Related DE69130248T2 (de) 1990-10-30 1991-10-30 Herstellungsverfahren für einen Halbleiterspeicher

Country Status (4)

Country Link
US (1) US5242850A (de)
EP (1) EP0484128B1 (de)
JP (1) JP2913817B2 (de)
DE (1) DE69130248T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3548984B2 (ja) * 1991-11-14 2004-08-04 富士通株式会社 半導体装置の製造方法
US5369043A (en) * 1992-12-25 1994-11-29 Nippon Telegraph And Telephone Corporation Semiconductor circuit device and method for production thereof
US5380676A (en) * 1994-05-23 1995-01-10 United Microelectronics Corporation Method of manufacturing a high density ROM
GB2300983A (en) * 1995-05-13 1996-11-20 Holtek Microelectronics Inc Flexible CMOS IC layout method
WO2001054194A1 (en) * 2000-01-20 2001-07-26 Zavitan Semiconductors, Inc. Personalized hardware
DE10007176A1 (de) * 2000-02-17 2001-08-30 Infineon Technologies Ag Dekodiervorrichtung
US7316934B2 (en) * 2000-12-18 2008-01-08 Zavitan Semiconductors, Inc. Personalized hardware
US6642147B2 (en) 2001-08-23 2003-11-04 International Business Machines Corporation Method of making thermally stable planarizing films
US6562713B1 (en) 2002-02-19 2003-05-13 International Business Machines Corporation Method of protecting semiconductor areas while exposing a gate
JP3975099B2 (ja) * 2002-03-26 2007-09-12 富士通株式会社 半導体装置の製造方法
US7396713B2 (en) * 2005-10-07 2008-07-08 International Business Machines Corporation Structure and method for forming asymmetrical overlap capacitance in field effect transistors

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4011653A (en) * 1971-08-23 1977-03-15 Tokyo Shibaura Electric Co., Ltd. Method for manufacturing a semiconductor integrated circuit including an insulating gate type semiconductor transistor
US4145701A (en) * 1974-09-11 1979-03-20 Hitachi, Ltd. Semiconductor device
US4402761A (en) * 1978-12-15 1983-09-06 Raytheon Company Method of making self-aligned gate MOS device having small channel lengths
JPS60241259A (ja) * 1984-05-16 1985-11-30 Hitachi Micro Comput Eng Ltd リ−ド・オンリ−・メモリの製造方法
JPS61218165A (ja) * 1985-03-25 1986-09-27 Hitachi Ltd 半導体記憶装置及び製造方法
US4908327A (en) * 1988-05-02 1990-03-13 Texas Instruments, Incorporated Counter-doped transistor
US4927777A (en) * 1989-01-24 1990-05-22 Harris Corporation Method of making a MOS transistor
US4951100A (en) * 1989-07-03 1990-08-21 Motorola, Inc. Hot electron collector for a LDD transistor

Also Published As

Publication number Publication date
EP0484128B1 (de) 1998-09-23
DE69130248T2 (de) 1999-04-29
JPH04165671A (ja) 1992-06-11
JP2913817B2 (ja) 1999-06-28
US5242850A (en) 1993-09-07
EP0484128A1 (de) 1992-05-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee