DE69129603D1 - Halbleiterspeicheranordnung mit einem verbesserten Schreibmodus - Google Patents
Halbleiterspeicheranordnung mit einem verbesserten SchreibmodusInfo
- Publication number
- DE69129603D1 DE69129603D1 DE69129603T DE69129603T DE69129603D1 DE 69129603 D1 DE69129603 D1 DE 69129603D1 DE 69129603 T DE69129603 T DE 69129603T DE 69129603 T DE69129603 T DE 69129603T DE 69129603 D1 DE69129603 D1 DE 69129603D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- write mode
- improved write
- improved
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1087—Data input latches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6140990 | 1990-03-12 | ||
JP8404190 | 1990-03-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69129603D1 true DE69129603D1 (de) | 1998-07-23 |
DE69129603T2 DE69129603T2 (de) | 1999-02-11 |
Family
ID=26402441
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69129603T Expired - Lifetime DE69129603T2 (de) | 1990-03-12 | 1991-03-11 | Halbleiterspeicheranordnung mit einem verbesserten Schreibmodus |
Country Status (4)
Country | Link |
---|---|
US (1) | US5285413A (de) |
EP (1) | EP0446847B1 (de) |
KR (1) | KR950003604B1 (de) |
DE (1) | DE69129603T2 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2863012B2 (ja) * | 1990-12-18 | 1999-03-03 | 三菱電機株式会社 | 半導体記憶装置 |
JP3365650B2 (ja) * | 1993-05-31 | 2003-01-14 | 沖電気工業株式会社 | 半導体メモリ装置 |
US5629901A (en) * | 1995-12-05 | 1997-05-13 | International Business Machines Corporation | Multi write port register |
DE19960557B4 (de) * | 1999-12-15 | 2006-09-07 | Infineon Technologies Ag | Integrierter dynamischer Halbleiterspeicher mit zeitlich gesteuertem Lesezugriff |
CN100401371C (zh) * | 2004-02-10 | 2008-07-09 | 恩益禧电子股份有限公司 | 能够实现高速访问的图像存储器结构 |
US10090040B1 (en) | 2017-03-29 | 2018-10-02 | Qualcomm Incorporated | Systems and methods for reducing memory power consumption via pre-filled DRAM values |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6047666B2 (ja) * | 1981-01-29 | 1985-10-23 | 富士通株式会社 | 半導体記憶装置の書込み方式 |
US4567578A (en) * | 1982-09-08 | 1986-01-28 | Harris Corporation | Cache memory flush scheme |
US4616341A (en) * | 1983-06-30 | 1986-10-07 | International Business Machines Corporation | Directory memory system having simultaneous write and comparison data bypass capabilities |
JPS6194290A (ja) * | 1984-10-15 | 1986-05-13 | Fujitsu Ltd | 半導体メモリ |
EP0179605B1 (de) * | 1984-10-17 | 1992-08-19 | Fujitsu Limited | Halbleiterspeicheranordnung mit einer seriellen Dateneingangs- und Ausgangsschaltung |
JPS61104391A (ja) * | 1984-10-23 | 1986-05-22 | Fujitsu Ltd | 半導体記憶装置 |
JP2559028B2 (ja) * | 1986-03-20 | 1996-11-27 | 富士通株式会社 | 半導体記憶装置 |
DE3773773D1 (de) * | 1986-06-25 | 1991-11-21 | Nec Corp | Pruefschaltung fuer eine speichereinrichtung mit willkuerlichem zugriff. |
JPS63177392A (ja) * | 1987-01-19 | 1988-07-21 | Toshiba Corp | 半導体記憶装置 |
EP0293933B1 (de) * | 1987-06-04 | 1993-10-13 | Nec Corporation | Dynamische Speicherschaltung mit einem Abfühlschema |
DE3850483T2 (de) * | 1987-12-21 | 1994-10-20 | Toshiba Kawasaki Kk | Halbleiterspeicher, der fähig zur Verbesserung der Datenwiedereinschreibgeschwindigkeit ist. |
JPH0770212B2 (ja) * | 1988-07-19 | 1995-07-31 | 日本電気株式会社 | 半導体メモリ回路 |
-
1991
- 1991-03-11 EP EP91103714A patent/EP0446847B1/de not_active Expired - Lifetime
- 1991-03-11 DE DE69129603T patent/DE69129603T2/de not_active Expired - Lifetime
- 1991-03-12 US US07/667,984 patent/US5285413A/en not_active Expired - Lifetime
- 1991-03-12 KR KR1019910003894A patent/KR950003604B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR950003604B1 (ko) | 1995-04-14 |
US5285413A (en) | 1994-02-08 |
EP0446847A3 (de) | 1994-02-02 |
EP0446847B1 (de) | 1998-06-17 |
KR910017423A (ko) | 1991-11-05 |
EP0446847A2 (de) | 1991-09-18 |
DE69129603T2 (de) | 1999-02-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC CORP., TOKIO/TOKYO, JP Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: ELPIDA MEMORY, INC., TOKYO, JP |