DE69129060T2 - Halbleitergerät mit Spannungsbelastungskontaktfläche - Google Patents
Halbleitergerät mit SpannungsbelastungskontaktflächeInfo
- Publication number
- DE69129060T2 DE69129060T2 DE69129060T DE69129060T DE69129060T2 DE 69129060 T2 DE69129060 T2 DE 69129060T2 DE 69129060 T DE69129060 T DE 69129060T DE 69129060 T DE69129060 T DE 69129060T DE 69129060 T2 DE69129060 T2 DE 69129060T2
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor device
- stress testing
- contact surface
- voltage stress
- voltage load
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/316—Testing of analog circuits
- G01R31/3161—Marginal testing
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31712—Input or output aspects
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31712—Input or output aspects
- G01R31/31715—Testing of input or output circuits; test of circuitry between the I/C pins and the functional core, e.g. testing of input or output driver, receiver, buffer
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP41876490A JP3381929B2 (ja) | 1990-12-27 | 1990-12-27 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69129060D1 DE69129060D1 (de) | 1998-04-16 |
DE69129060T2 true DE69129060T2 (de) | 1998-07-30 |
Family
ID=18526550
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69129060T Expired - Fee Related DE69129060T2 (de) | 1990-12-27 | 1991-12-23 | Halbleitergerät mit Spannungsbelastungskontaktfläche |
Country Status (5)
Country | Link |
---|---|
US (1) | US5357193A (de) |
EP (1) | EP0492609B1 (de) |
JP (1) | JP3381929B2 (de) |
KR (1) | KR950014558B1 (de) |
DE (1) | DE69129060T2 (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2533221B2 (ja) * | 1990-05-11 | 1996-09-11 | 株式会社東芝 | ダイナミック型ランダムアクセスメモリ |
US5391984A (en) * | 1991-11-01 | 1995-02-21 | Sgs-Thomson Microelectronics, Inc. | Method and apparatus for testing integrated circuit devices |
US5648730A (en) * | 1994-11-30 | 1997-07-15 | Texas Instruments Incorporated | Large integrated circuit with modular probe structures |
US5627787A (en) * | 1995-01-03 | 1997-05-06 | Sgs-Thomson Microelectronics, Inc. | Periphery stress test for synchronous RAMs |
KR100375177B1 (ko) * | 1995-05-19 | 2003-05-09 | 마츠시타 덴끼 산교 가부시키가이샤 | 반도체 장치의 검사방법 |
KR100220949B1 (ko) * | 1996-11-06 | 1999-09-15 | 김영환 | 웨이퍼 번-인 회로 |
JPH10269767A (ja) * | 1997-03-19 | 1998-10-09 | Mitsubishi Electric Corp | 半導体装置 |
US5898706A (en) * | 1997-04-30 | 1999-04-27 | International Business Machines Corporation | Structure and method for reliability stressing of dielectrics |
US6037795A (en) * | 1997-09-26 | 2000-03-14 | International Business Machines Corporation | Multiple device test layout |
US5999466A (en) * | 1998-01-13 | 1999-12-07 | Micron Technology, Inc. | Method, apparatus and system for voltage screening of integrated circuits |
US6055199A (en) * | 1998-10-21 | 2000-04-25 | Mitsubishi Denki Kabushiki Kaisha | Test circuit for a semiconductor memory device and method for burn-in test |
US6327682B1 (en) | 1999-03-22 | 2001-12-04 | Taiwan Semiconductor Manufacturing Company | Wafer burn-in design for DRAM and FeRAM devices |
JP2001067898A (ja) * | 1999-08-30 | 2001-03-16 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP4783487B2 (ja) * | 2000-02-22 | 2011-09-28 | 株式会社カネカ | 太陽電池モジュールの逆バイアス処理装置 |
JP2004247026A (ja) * | 2003-01-24 | 2004-09-02 | Renesas Technology Corp | 半導体集積回路及びicカード |
KR100542695B1 (ko) * | 2003-11-13 | 2006-01-11 | 주식회사 하이닉스반도체 | 반도체 소자의 테스트 모드 회로 |
KR20100125099A (ko) * | 2009-05-20 | 2010-11-30 | 삼성전자주식회사 | 반도체 장치 |
KR20210026432A (ko) * | 2019-08-30 | 2021-03-10 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3961254A (en) * | 1974-12-20 | 1976-06-01 | International Business Machines Corporation | Testing embedded arrays |
DE2905294A1 (de) * | 1979-02-12 | 1980-08-21 | Philips Patentverwaltung | Integrierte schaltungsanordnung in mos-technik mit feldeffekttransistoren |
DE2905271A1 (de) * | 1979-02-12 | 1980-08-21 | Philips Patentverwaltung | Integrierte schaltungsanordnung in mos-technik mit feldeffekttransistoren |
DE2944149C2 (de) * | 1979-11-02 | 1985-02-21 | Philips Patentverwaltung Gmbh, 2000 Hamburg | Integrierte Schaltungsanordnung in MOS-Technik |
WO1982000917A1 (en) * | 1980-09-08 | 1982-03-18 | Proebsting R | Tape burn-in circuit |
EP0059184A1 (de) * | 1980-09-08 | 1982-09-08 | Mostek Corporation | Funktionstest für halbleiterspeicher bei versorgungsspannungsgrenzwerten |
US4357703A (en) * | 1980-10-09 | 1982-11-02 | Control Data Corporation | Test system for LSI circuits resident on LSI chips |
US4519076A (en) * | 1981-12-28 | 1985-05-21 | National Semiconductor Corporation | Memory core testing system |
JPS59500840A (ja) * | 1982-05-17 | 1984-05-10 | モトロ−ラ・インコ−ポレ−テツド | メモリの加速試験用のパッド |
JPS60235455A (ja) * | 1984-05-09 | 1985-11-22 | Toshiba Corp | ダイナミツクメモリ− |
JPS61265829A (ja) * | 1985-05-20 | 1986-11-25 | Fujitsu Ltd | 半導体集積回路 |
US4733168A (en) * | 1986-03-21 | 1988-03-22 | Harris Corporation | Test enabling circuit for enabling overhead test circuitry in programmable devices |
US4970454A (en) * | 1986-12-09 | 1990-11-13 | Texas Instruments Incorporated | Packaged semiconductor device with test circuits for determining fabrication parameters |
US4751679A (en) * | 1986-12-22 | 1988-06-14 | Motorola, Inc. | Gate stress test of a MOS memory |
EP0387379B1 (de) * | 1989-03-16 | 1995-01-18 | Siemens Aktiengesellschaft | Integrierter Halbleiterspeicher vom Typ DRAM und Verfahren zu seinem Testen |
US5107208A (en) * | 1989-12-19 | 1992-04-21 | North American Philips Corporation | System for partitioning and testing submodule circuits of an integrated circuit |
-
1990
- 1990-12-27 JP JP41876490A patent/JP3381929B2/ja not_active Expired - Fee Related
-
1991
- 1991-12-23 EP EP91122191A patent/EP0492609B1/de not_active Expired - Lifetime
- 1991-12-23 DE DE69129060T patent/DE69129060T2/de not_active Expired - Fee Related
- 1991-12-24 KR KR1019910024148A patent/KR950014558B1/ko not_active IP Right Cessation
- 1991-12-26 US US07/813,523 patent/US5357193A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JP3381929B2 (ja) | 2003-03-04 |
JPH04230049A (ja) | 1992-08-19 |
US5357193A (en) | 1994-10-18 |
DE69129060D1 (de) | 1998-04-16 |
EP0492609A2 (de) | 1992-07-01 |
EP0492609B1 (de) | 1998-03-11 |
KR950014558B1 (ko) | 1995-12-05 |
EP0492609A3 (en) | 1993-04-21 |
KR920013455A (ko) | 1992-07-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |