DE69128566D1 - Zusammengesetzte integrierte Schaltungsanordnung - Google Patents

Zusammengesetzte integrierte Schaltungsanordnung

Info

Publication number
DE69128566D1
DE69128566D1 DE69128566T DE69128566T DE69128566D1 DE 69128566 D1 DE69128566 D1 DE 69128566D1 DE 69128566 T DE69128566 T DE 69128566T DE 69128566 T DE69128566 T DE 69128566T DE 69128566 D1 DE69128566 D1 DE 69128566D1
Authority
DE
Germany
Prior art keywords
integrated circuit
circuit arrangement
composite integrated
composite
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69128566T
Other languages
English (en)
Other versions
DE69128566T2 (de
Inventor
Akio Nakagawa
Tsuneo Ogura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69128566D1 publication Critical patent/DE69128566D1/de
Application granted granted Critical
Publication of DE69128566T2 publication Critical patent/DE69128566T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
DE1991628566 1990-07-02 1991-07-02 Zusammengesetzte integrierte Schaltungsanordnung Expired - Fee Related DE69128566T2 (de)

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JPH01318266A (ja) * 1988-06-17 1989-12-22 Sanyo Electric Co Ltd 可変容量ダイオード
JPH023238A (ja) * 1988-06-20 1990-01-08 Nissan Motor Co Ltd 薄膜バイポーラトランジスタの製造方法
JPH02102569A (ja) * 1988-10-12 1990-04-16 Nippon Telegr & Teleph Corp <Ntt> 半導体装置

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JPH04218953A (ja) 1992-08-10
JP3190057B2 (ja) 2001-07-16
EP0465227A3 (en) 1992-10-07
US5477065A (en) 1995-12-19
EP0740338A2 (de) 1996-10-30
DE69128566T2 (de) 1998-05-14
EP0465227B1 (de) 1998-01-07
EP0740338A3 (de) 1998-01-07
US5714782A (en) 1998-02-03
EP0465227A2 (de) 1992-01-08

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