DE69007446D1 - Verfahren zur Herstellung einer Halbleiteranordnung mit einem NPN Bipolartransistor. - Google Patents

Verfahren zur Herstellung einer Halbleiteranordnung mit einem NPN Bipolartransistor.

Info

Publication number
DE69007446D1
DE69007446D1 DE90203348T DE69007446T DE69007446D1 DE 69007446 D1 DE69007446 D1 DE 69007446D1 DE 90203348 T DE90203348 T DE 90203348T DE 69007446 T DE69007446 T DE 69007446T DE 69007446 D1 DE69007446 D1 DE 69007446D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor device
bipolar transistor
npn bipolar
npn
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE90203348T
Other languages
English (en)
Other versions
DE69007446T2 (de
Inventor
Schravendijk Bart Van
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE69007446D1 publication Critical patent/DE69007446D1/de
Application granted granted Critical
Publication of DE69007446T2 publication Critical patent/DE69007446T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
DE69007446T 1989-12-21 1990-12-17 Verfahren zur Herstellung einer Halbleiteranordnung mit einem NPN Bipolartransistor. Expired - Fee Related DE69007446T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US45601489A 1989-12-21 1989-12-21

Publications (2)

Publication Number Publication Date
DE69007446D1 true DE69007446D1 (de) 1994-04-21
DE69007446T2 DE69007446T2 (de) 1994-09-29

Family

ID=23811098

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69007446T Expired - Fee Related DE69007446T2 (de) 1989-12-21 1990-12-17 Verfahren zur Herstellung einer Halbleiteranordnung mit einem NPN Bipolartransistor.

Country Status (4)

Country Link
EP (1) EP0434153B1 (de)
JP (1) JPH0727916B2 (de)
KR (1) KR910013579A (de)
DE (1) DE69007446T2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8528224B2 (en) * 2009-11-12 2013-09-10 Novellus Systems, Inc. Systems and methods for at least partially converting films to silicon oxide and/or improving film quality using ultraviolet curing in steam and densification of films using UV curing in ammonia
JP5700025B2 (ja) * 2012-11-27 2015-04-15 トヨタ自動車株式会社 半導体装置とその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2946963A1 (de) * 1979-11-21 1981-06-04 Siemens AG, 1000 Berlin und 8000 München Schnelle bipolare transistoren
US4542580A (en) * 1983-02-14 1985-09-24 Prime Computer, Inc. Method of fabricating n-type silicon regions and associated contacts
JPS60245131A (ja) * 1984-05-18 1985-12-04 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
US4689667A (en) * 1985-06-11 1987-08-25 Fairchild Semiconductor Corporation Method of controlling dopant diffusion and dopant electrical activation by implanted inert gas atoms
EP0255882A3 (de) * 1986-08-07 1990-05-30 Siemens Aktiengesellschaft npn-Bipolartransistor mit extrem flachen Emitter/Basis-Strukturen und Verfahren zu seiner Herstellung
JPH0695521B2 (ja) * 1987-02-19 1994-11-24 富士通株式会社 バイポ−ラトランジスタの製造方法
JPS63208214A (ja) * 1987-02-24 1988-08-29 Nec Corp ド−ピング方法

Also Published As

Publication number Publication date
EP0434153B1 (de) 1994-03-16
EP0434153A1 (de) 1991-06-26
JPH0727916B2 (ja) 1995-03-29
DE69007446T2 (de) 1994-09-29
KR910013579A (ko) 1991-08-08
JPH0429325A (ja) 1992-01-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8327 Change in the person/name/address of the patent owner

Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N

8339 Ceased/non-payment of the annual fee