DE3888462D1 - Verfahren zur Herstellung einer gegen Überspannungen selbst-geschützten Halbleiteranordnung. - Google Patents

Verfahren zur Herstellung einer gegen Überspannungen selbst-geschützten Halbleiteranordnung.

Info

Publication number
DE3888462D1
DE3888462D1 DE88119221T DE3888462T DE3888462D1 DE 3888462 D1 DE3888462 D1 DE 3888462D1 DE 88119221 T DE88119221 T DE 88119221T DE 3888462 T DE3888462 T DE 3888462T DE 3888462 D1 DE3888462 D1 DE 3888462D1
Authority
DE
Germany
Prior art keywords
self
producing
semiconductor device
protected against
against overvoltages
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE88119221T
Other languages
English (en)
Other versions
DE3888462T2 (de
Inventor
Yoshiaki C O Patent Di Tsunoda
Masatoshi C O Patent Di Kanaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3888462D1 publication Critical patent/DE3888462D1/de
Publication of DE3888462T2 publication Critical patent/DE3888462T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66363—Thyristors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
    • H01L29/7424—Thyristor-type devices, e.g. having four-zone regenerative action having a built-in localised breakdown/breakover region, e.g. self-protected against destructive spontaneous, e.g. voltage breakover, firing

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thyristors (AREA)
DE3888462T 1987-11-21 1988-11-18 Verfahren zur Herstellung einer gegen Überspannungen selbst-geschützten Halbleiteranordnung. Expired - Fee Related DE3888462T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62294364A JPH01136369A (ja) 1987-11-21 1987-11-21 過電圧保護機能付半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE3888462D1 true DE3888462D1 (de) 1994-04-21
DE3888462T2 DE3888462T2 (de) 1994-07-21

Family

ID=17806754

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3888462T Expired - Fee Related DE3888462T2 (de) 1987-11-21 1988-11-18 Verfahren zur Herstellung einer gegen Überspannungen selbst-geschützten Halbleiteranordnung.

Country Status (5)

Country Link
US (1) US4929563A (de)
EP (1) EP0317915B1 (de)
JP (1) JPH01136369A (de)
CA (1) CA1293334C (de)
DE (1) DE3888462T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5243205A (en) * 1989-10-16 1993-09-07 Kabushiki Kaisha Toshiba Semiconductor device with overvoltage protective function
DE59010309D1 (de) * 1990-03-12 1996-06-05 Siemens Ag Verfahren zur definierten Spannungseinstellung bei überkopfzündfesten Halbleiterbauelementen und Halbleiterbauelemente mit definierter Überkopfzündspannung
US5240865A (en) * 1990-07-30 1993-08-31 Texas Instruments Incorporated Method of forming a thyristor on an SOI substrate
US5204273A (en) * 1990-08-20 1993-04-20 Siemens Aktiengesellschaft Method for the manufacturing of a thyristor with defined lateral resistor
JP2960506B2 (ja) * 1990-09-19 1999-10-06 株式会社日立製作所 ターンオフ形半導体素子
JP3155797B2 (ja) * 1991-12-26 2001-04-16 株式会社日立製作所 過電圧自己保護型半導体装置、及び、それを使用した半導体回路
US7736976B2 (en) * 2001-10-04 2010-06-15 Vishay General Semiconductor Llc Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands
US6649477B2 (en) * 2001-10-04 2003-11-18 General Semiconductor, Inc. Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands
US6686244B2 (en) * 2002-03-21 2004-02-03 General Semiconductor, Inc. Power semiconductor device having a voltage sustaining region that includes doped columns formed with a single ion implantation step
CN108767007B (zh) * 2018-06-04 2021-01-22 电子科技大学 一种具有挖槽埋氧电流阻挡层的光控晶闸管

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH594984A5 (de) * 1976-06-02 1978-01-31 Bbc Brown Boveri & Cie
US4555845A (en) * 1982-10-13 1985-12-03 Westinghouse Electric Corp. Temperature stable self-protected thyristor and method of producing
US4514898A (en) * 1983-02-18 1985-05-07 Westinghouse Electric Corp. Method of making a self protected thyristor
IE840248L (en) * 1983-02-18 1984-08-18 Westinghouse Electric Corp Light activated power transistor
US4516315A (en) * 1983-05-09 1985-05-14 Westinghouse Electric Corp. Method of making a self-protected thyristor
IE861474L (en) * 1985-06-20 1986-12-20 Tsnii Kozhevenno Obuvnoi Ptomy Temperature stable self-protected thyristor and method of¹producing

Also Published As

Publication number Publication date
JPH0469823B2 (de) 1992-11-09
DE3888462T2 (de) 1994-07-21
EP0317915B1 (de) 1994-03-16
EP0317915A3 (en) 1990-04-11
JPH01136369A (ja) 1989-05-29
EP0317915A2 (de) 1989-05-31
CA1293334C (en) 1991-12-17
US4929563A (en) 1990-05-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee