DE3870842D1 - Verfahren zur herstellung eines halbleiterbauelementes mit mindestens einem bipolaren heterouebergangstransistor. - Google Patents

Verfahren zur herstellung eines halbleiterbauelementes mit mindestens einem bipolaren heterouebergangstransistor.

Info

Publication number
DE3870842D1
DE3870842D1 DE8888202927T DE3870842T DE3870842D1 DE 3870842 D1 DE3870842 D1 DE 3870842D1 DE 8888202927 T DE8888202927 T DE 8888202927T DE 3870842 T DE3870842 T DE 3870842T DE 3870842 D1 DE3870842 D1 DE 3870842D1
Authority
DE
Germany
Prior art keywords
transitionor
heterouis
bipolar
producing
semiconductor component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8888202927T
Other languages
English (en)
Inventor
Daniel Selle
Philippe Boissenot
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3870842D1 publication Critical patent/DE3870842D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/6631Bipolar junction transistors [BJT] with an active layer made of a group 13/15 material
    • H01L29/66318Heterojunction transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/737Hetero-junction transistors
    • H01L29/7371Vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
DE8888202927T 1987-12-30 1988-12-19 Verfahren zur herstellung eines halbleiterbauelementes mit mindestens einem bipolaren heterouebergangstransistor. Expired - Lifetime DE3870842D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8718392A FR2625613B1 (de) 1987-12-30 1987-12-30

Publications (1)

Publication Number Publication Date
DE3870842D1 true DE3870842D1 (de) 1992-06-11

Family

ID=9358460

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888202927T Expired - Lifetime DE3870842D1 (de) 1987-12-30 1988-12-19 Verfahren zur herstellung eines halbleiterbauelementes mit mindestens einem bipolaren heterouebergangstransistor.

Country Status (6)

Country Link
US (1) US4889821A (de)
EP (1) EP0322960B1 (de)
JP (1) JPH0622243B2 (de)
KR (1) KR970010738B1 (de)
DE (1) DE3870842D1 (de)
FR (1) FR2625613B1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4967254A (en) * 1987-07-16 1990-10-30 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
US5064772A (en) * 1988-08-31 1991-11-12 International Business Machines Corporation Bipolar transistor integrated circuit technology
US5098853A (en) * 1988-11-02 1992-03-24 Hughes Aircraft Company Self-aligned, planar heterojunction bipolar transistor and method of forming the same
FR2658362A1 (fr) * 1990-02-09 1991-08-16 Philips Electronique Lab Procede de realisation par autoalignement, d'un dispositif semiconducteur integre, comprenant au moins la formation d'un premier contact d'electrode encapsule et muni d'espaceurs et d'un second contact d'electrode autoaligne sur celui-ci.
US5059555A (en) * 1990-08-20 1991-10-22 National Semiconductor Corporation Method to fabricate vertical fuse devices and Schottky diodes using thin sacrificial layer
EP0478923B1 (de) * 1990-08-31 1997-11-05 Texas Instruments Incorporated Verfahren zum Herstellen selbst-ausrichtender bipolarer Transistoren mit Heteroübergang
US5136764A (en) * 1990-09-27 1992-08-11 Motorola, Inc. Method for forming a field emission device
FR2693839B1 (fr) * 1992-07-17 1994-09-02 Thomson Csf Procédé de réalisation d'un transistor bipolaire.
US5471078A (en) * 1992-09-09 1995-11-28 Texas Instruments Incorporated Self-aligned heterojunction bipolar transistor
US5583059A (en) * 1994-06-01 1996-12-10 International Business Machines Corporation Fabrication of vertical SiGe base HBT with lateral collector contact on thin SOI
US6680497B1 (en) * 2000-09-22 2004-01-20 Trw Inc. Interstitial diffusion barrier
US7132701B1 (en) * 2001-07-27 2006-11-07 Fairchild Semiconductor Corporation Contact method for thin silicon carbide epitaxial layer and semiconductor devices formed by those methods
KR20030075993A (ko) * 2002-03-22 2003-09-26 삼성전자주식회사 편자형 에미터 전극을 갖는 이종 접합 바이폴라트랜지스터 및 그 제조 방법
CN103035690B (zh) * 2012-06-08 2015-06-03 上海华虹宏力半导体制造有限公司 击穿电压为7-10v锗硅异质结双极晶体管及其制备方法
US9281245B2 (en) * 2012-12-28 2016-03-08 Texas Instruments Incorporated Latchup reduction by grown orthogonal substrates
EP4002481A1 (de) * 2020-11-19 2022-05-25 Imec VZW Bipolarer transistor mit niedrigem parasitären ccb-heteroübergang

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3627647A (en) * 1969-05-19 1971-12-14 Cogar Corp Fabrication method for semiconductor devices
US4032957A (en) * 1972-12-29 1977-06-28 Sony Corporation Semiconductor device
DE2555047A1 (de) * 1975-12-06 1977-06-16 Licentia Gmbh Monolithisch integrierte halbleiterschaltung
JPH0744182B2 (ja) * 1984-11-09 1995-05-15 株式会社日立製作所 ヘテロ接合バイポ−ラ・トランジスタ
JPS62224073A (ja) * 1986-03-26 1987-10-02 Hitachi Ltd ヘテロ接合バイポ−ラ・トランジスタの製造方法
US4818712A (en) * 1987-10-13 1989-04-04 Northrop Corporation Aluminum liftoff masking process and product

Also Published As

Publication number Publication date
KR890011026A (ko) 1989-08-12
US4889821A (en) 1989-12-26
FR2625613A1 (de) 1989-07-07
EP0322960A1 (de) 1989-07-05
JPH0622243B2 (ja) 1994-03-23
JPH023240A (ja) 1990-01-08
FR2625613B1 (de) 1990-05-04
KR970010738B1 (ko) 1997-06-30
EP0322960B1 (de) 1992-05-06

Similar Documents

Publication Publication Date Title
DE69023976D1 (de) Verfahren zur Herstellung eines Halbleiterbauelementes mit einem T-Gate.
DE3583183D1 (de) Verfahren zur herstellung eines halbleitersubstrates.
DE3855861D1 (de) Verfahren zur Herstellung eines Halbleiterbauelementes mit einer isolierten Gitterstruktur
DE3483444D1 (de) Verfahren zur herstellung eines halbleiterbauelementes.
DE3576609D1 (de) Verfahren zur herstellung eines heterouebergang-bipolartransistors.
DE69023956D1 (de) Verfahren zur Herstellung eines III-V-Verbindungshalbleiterbauelementes.
DE3381880D1 (de) Verfahren zur herstellung einer halbleiteranordnung mit einem diffusionsschritt.
DE3585587D1 (de) Verfahren zur herstellung eines halbleiterbeschleunigungsmessers.
DE3680520D1 (de) Verfahren zum herstellen einer monolithisch integrierten schaltung mit mindestens einem bipolaren planartransistor.
DE69334180D1 (de) Verfahren zur herstellung eines halbleiterbauelements mit mindestens einem chip und entsprechendes bauelement.
DE69016397D1 (de) Verfahren zur herstellung einer feldemitteranordnung mit automatischer gate-justierung.
DE3854238D1 (de) Verfahren zur Herstellung eines supraleitenden Elements.
DE3587588D1 (de) Verfahren zur Herstellung einer Halbleitervorrichtung mit einem optischen und einem elektronischen Bauelement.
DE3777603D1 (de) Verfahren zur herstellung einer halbleiteranordnung mit einem halbleitersubstrat, das feldoxidzonen an seiner oberflaeche enthaelt.
DE3483413D1 (de) Verfahren zur herstellung eines zusammengesetzten bauteiles.
DE3851801D1 (de) Verfahren zur Herstellung eines supraleitenden Drahtes mit einem Oxyd-Supraleiter.
DE3851125D1 (de) Verfahren zur Herstellung eines Halbleiterbauelementes mit Schaltungsmaterial gefüllter Rille.
DE3870842D1 (de) Verfahren zur herstellung eines halbleiterbauelementes mit mindestens einem bipolaren heterouebergangstransistor.
DE68907279D1 (de) Verfahren zur herstellung einer transparenten schicht mit einem niedrigen widerstand.
DE3883129D1 (de) Verfahren zur herstellung eines supraleitenden drahtes.
DE69415927D1 (de) Verfahren zur Herstellung eines Halbleiterbauelements mit einer Höckerelectrode
DE3582434D1 (de) Verfahren zur herstellung eines halbleiters auf einem isolator.
DE3871928D1 (de) Verfahren zur herstellung eines bipolaren heterouebergangstransistor.
DE3779802D1 (de) Verfahren zur herstellung einer halbleiteranordnung.
DE3650133D1 (de) Verfahren zur Herstellung eines Halbleiterlasers mit versenktem Heteroübergang.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8327 Change in the person/name/address of the patent owner

Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N

8339 Ceased/non-payment of the annual fee