DE3485457D1 - Verfahren zur herstellung eines lateralen pnp-transistors. - Google Patents

Verfahren zur herstellung eines lateralen pnp-transistors.

Info

Publication number
DE3485457D1
DE3485457D1 DE8484113729T DE3485457T DE3485457D1 DE 3485457 D1 DE3485457 D1 DE 3485457D1 DE 8484113729 T DE8484113729 T DE 8484113729T DE 3485457 T DE3485457 T DE 3485457T DE 3485457 D1 DE3485457 D1 DE 3485457D1
Authority
DE
Germany
Prior art keywords
producing
pnp transistor
lateral pnp
lateral
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8484113729T
Other languages
English (en)
Inventor
Narasipur G Anantha
Santosh P Gaur
Yi-Shiou Huang
Paul J Tsang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3485457D1 publication Critical patent/DE3485457D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/6625—Lateral transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H01L21/8224—Bipolar technology comprising a combination of vertical and lateral transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0821—Collector regions of bipolar transistors
    • H01L29/0826—Pedestal collectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/735—Lateral transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
DE8484113729T 1983-12-06 1984-11-14 Verfahren zur herstellung eines lateralen pnp-transistors. Expired - Fee Related DE3485457D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/558,740 US4510676A (en) 1983-12-06 1983-12-06 Method of fabricating a lateral PNP transistor

Publications (1)

Publication Number Publication Date
DE3485457D1 true DE3485457D1 (de) 1992-02-27

Family

ID=24230788

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484113729T Expired - Fee Related DE3485457D1 (de) 1983-12-06 1984-11-14 Verfahren zur herstellung eines lateralen pnp-transistors.

Country Status (4)

Country Link
US (1) US4510676A (de)
EP (1) EP0144823B1 (de)
JP (1) JPS60124869A (de)
DE (1) DE3485457D1 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3361832D1 (en) * 1982-04-19 1986-02-27 Matsushita Electric Ind Co Ltd Semiconductor ic and method of making the same
JPS5994861A (ja) * 1982-11-24 1984-05-31 Hitachi Ltd 半導体集積回路装置及びその製造方法
US4887145A (en) * 1985-12-04 1989-12-12 Hitachi, Ltd. Semiconductor device in which electrodes are formed in a self-aligned manner
DE3545244A1 (de) * 1985-12-20 1987-06-25 Licentia Gmbh Strukturierter halbleiterkoerper
FR2592525B1 (fr) * 1985-12-31 1988-02-12 Radiotechnique Compelec Procede de fabrication d'un transistor lateral integre et circuit integre le comprenant
US4760433A (en) * 1986-01-31 1988-07-26 Harris Corporation ESD protection transistors
JPS62226666A (ja) * 1986-03-28 1987-10-05 Toshiba Corp 半導体装置の製造方法
JP2635961B2 (ja) * 1986-09-26 1997-07-30 株式会社日立製作所 半導体装置の製造方法
US5014107A (en) * 1987-07-29 1991-05-07 Fairchild Semiconductor Corporation Process for fabricating complementary contactless vertical bipolar transistors
US5258644A (en) * 1988-02-24 1993-11-02 Hitachi, Ltd. Semiconductor device and method of manufacture thereof
US5045911A (en) * 1989-03-02 1991-09-03 International Business Machines Corporation Lateral PNP transistor and method for forming same
DE69031846T2 (de) * 1989-04-21 1998-07-30 Nippon Electric Co Integrierte BICMOS-Schaltung
JPH03203265A (ja) * 1989-12-28 1991-09-04 Sony Corp 半導体装置
US6225679B1 (en) * 1997-05-12 2001-05-01 Sgs-Thomson Microelectronics S.A. Method and apparatus for protecting a device against voltage surges
DE69714575D1 (de) 1997-05-30 2002-09-12 St Microelectronics Srl Laterales PNP-bipolares elektronisches Bauelement und dessen Herstellungsverfahren
US6486525B1 (en) * 1998-07-14 2002-11-26 Texas Instruments Incorporated Deep trench isolation for reducing soft errors in integrated circuits
JP3988262B2 (ja) * 1998-07-24 2007-10-10 富士電機デバイステクノロジー株式会社 縦型超接合半導体素子およびその製造方法
SE519975C2 (sv) * 1999-06-23 2003-05-06 Ericsson Telefon Ab L M Halvledarstruktur för högspänningshalvledarkomponenter
US8878344B2 (en) 2012-10-18 2014-11-04 Analog Devices, Inc. Compound semiconductor lateral PNP bipolar transistors
US10224402B2 (en) 2014-11-13 2019-03-05 Texas Instruments Incorporated Method of improving lateral BJT characteristics in BCD technology

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5522946B2 (de) * 1973-02-07 1980-06-19
US3873989A (en) * 1973-05-07 1975-03-25 Fairchild Camera Instr Co Double-diffused, lateral transistor structure
JPS5240077A (en) * 1975-09-26 1977-03-28 Hitachi Ltd Process for production of lateral transistor
US4066473A (en) * 1976-07-15 1978-01-03 Fairchild Camera And Instrument Corporation Method of fabricating high-gain transistors
US4329703A (en) * 1978-07-21 1982-05-11 Monolithic Memories, Inc. Lateral PNP transistor
JPS5593261A (en) * 1979-01-09 1980-07-15 Nec Corp Horizontal-type transistor
US4283236A (en) * 1979-09-19 1981-08-11 Harris Corporation Method of fabricating lateral PNP transistors utilizing selective diffusion and counter doping
US4298402A (en) * 1980-02-04 1981-11-03 Fairchild Camera & Instrument Corp. Method of fabricating self-aligned lateral bipolar transistor utilizing special masking techniques
JPS56131954A (en) * 1980-03-19 1981-10-15 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device
US4339767A (en) * 1980-05-05 1982-07-13 International Business Machines Corporation High performance PNP and NPN transistor structure
JPS56160034A (en) * 1980-05-14 1981-12-09 Fujitsu Ltd Impurity diffusion
US4446611A (en) * 1980-06-26 1984-05-08 International Business Machines Corporation Method of making a saturation-limited bipolar transistor device
JPS57104254A (en) * 1980-12-22 1982-06-29 Hitachi Ltd Lateral-transistor
EP0059266A2 (de) * 1981-03-02 1982-09-08 Rockwell International Corporation Lateraler Transistor, isoliert vom Substrat durch gekreuzte, mit einem Oxid des Substrats gefüllte Rillen, zum Minimalisieren der Substratinterferenzen und Verfahren zu dessen Herstellung
US4419809A (en) * 1981-12-30 1983-12-13 International Business Machines Corporation Fabrication process of sub-micrometer channel length MOSFETs
US4431460A (en) * 1982-03-08 1984-02-14 International Business Machines Corporation Method of producing shallow, narrow base bipolar transistor structures via dual implantations of selected polycrystalline layer
JPS5972169A (ja) * 1982-10-18 1984-04-24 Nec Corp 半導体装置

Also Published As

Publication number Publication date
US4510676A (en) 1985-04-16
JPH0420265B2 (de) 1992-04-02
EP0144823B1 (de) 1992-01-15
EP0144823A2 (de) 1985-06-19
EP0144823A3 (en) 1987-05-13
JPS60124869A (ja) 1985-07-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee