DE68928552D1 - Integrierte Halbleiterschaltung und System unter Verwendung derselben Schaltung - Google Patents
Integrierte Halbleiterschaltung und System unter Verwendung derselben SchaltungInfo
- Publication number
- DE68928552D1 DE68928552D1 DE68928552T DE68928552T DE68928552D1 DE 68928552 D1 DE68928552 D1 DE 68928552D1 DE 68928552 T DE68928552 T DE 68928552T DE 68928552 T DE68928552 T DE 68928552T DE 68928552 D1 DE68928552 D1 DE 68928552D1
- Authority
- DE
- Germany
- Prior art keywords
- circuit
- semiconductor integrated
- integrated circuit
- same
- same circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
- H01L27/11896—Masterslice integrated circuits using combined field effect/bipolar technology
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
- G09G5/06—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using colour palettes, e.g. look-up tables
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/363—Graphics controllers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Theoretical Computer Science (AREA)
- Dram (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63115183A JP2663138B2 (ja) | 1988-05-11 | 1988-05-11 | 半導体集積回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68928552D1 true DE68928552D1 (de) | 1998-02-26 |
DE68928552T2 DE68928552T2 (de) | 1998-08-27 |
Family
ID=14656411
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68928552T Expired - Fee Related DE68928552T2 (de) | 1988-05-11 | 1989-05-11 | Integrierte Halbleiterschaltung und System unter Verwendung derselben Schaltung |
Country Status (5)
Country | Link |
---|---|
US (1) | US5398047A (de) |
EP (1) | EP0341726B1 (de) |
JP (1) | JP2663138B2 (de) |
KR (1) | KR0129128B1 (de) |
DE (1) | DE68928552T2 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10502181A (ja) * | 1994-06-20 | 1998-02-24 | ネオマジック・コーポレイション | メモリインタフェースのないグラフィックスコントローラ集積回路 |
JPH09306183A (ja) * | 1996-05-10 | 1997-11-28 | Mitsubishi Electric Corp | 半導体記憶装置 |
US5742557A (en) * | 1996-06-20 | 1998-04-21 | Northern Telecom Limited | Multi-port random access memory |
JPH1040685A (ja) * | 1996-07-23 | 1998-02-13 | Mitsubishi Electric Corp | 同期型記憶装置および同期型記憶装置におけるデータ読み出し方法 |
US7286417B2 (en) * | 2005-06-21 | 2007-10-23 | Micron Technology, Inc. | Low power dissipation voltage generator |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3700915A (en) * | 1971-01-18 | 1972-10-24 | Motorola Inc | Full-power/half-power logic gate |
JPS5596158A (en) * | 1979-01-16 | 1980-07-22 | Olympus Optical Co | Medicating tube |
US4357703A (en) * | 1980-10-09 | 1982-11-02 | Control Data Corporation | Test system for LSI circuits resident on LSI chips |
JPS58172021A (ja) * | 1982-04-02 | 1983-10-08 | Nec Corp | 半導体集積回路装置 |
US4541076A (en) * | 1982-05-13 | 1985-09-10 | Storage Technology Corporation | Dual port CMOS random access memory |
JPH0669142B2 (ja) * | 1983-04-15 | 1994-08-31 | 株式会社日立製作所 | 半導体集積回路装置 |
JPS6055386A (ja) * | 1983-09-07 | 1985-03-30 | 日本電気株式会社 | 半導体メモリ |
JPH0795395B2 (ja) * | 1984-02-13 | 1995-10-11 | 株式会社日立製作所 | 半導体集積回路 |
JPS60252280A (ja) * | 1984-05-28 | 1985-12-12 | Advantest Corp | ロジツクアナライザ |
JPS60254190A (ja) * | 1984-05-31 | 1985-12-14 | 株式会社 アスキ− | デイスプレイコントロ−ラ |
JPS62169520A (ja) * | 1986-01-22 | 1987-07-25 | Hitachi Ltd | Lsi |
JPS62189739A (ja) * | 1986-02-17 | 1987-08-19 | Hitachi Ltd | 半導体集積回路装置 |
US4779230A (en) * | 1986-12-29 | 1988-10-18 | Motorola, Inc. | CMOS static ram cell provided with an additional bipolar drive transistor |
JPS63263918A (ja) * | 1987-04-22 | 1988-10-31 | Hitachi Ltd | デイジタル集積回路 |
-
1988
- 1988-05-11 JP JP63115183A patent/JP2663138B2/ja not_active Expired - Fee Related
-
1989
- 1989-05-09 KR KR1019890006175A patent/KR0129128B1/ko not_active IP Right Cessation
- 1989-05-11 DE DE68928552T patent/DE68928552T2/de not_active Expired - Fee Related
- 1989-05-11 EP EP89108523A patent/EP0341726B1/de not_active Expired - Lifetime
-
1993
- 1993-08-30 US US08/112,982 patent/US5398047A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0341726B1 (de) | 1998-01-21 |
US5398047A (en) | 1995-03-14 |
EP0341726A3 (de) | 1992-07-22 |
JP2663138B2 (ja) | 1997-10-15 |
EP0341726A2 (de) | 1989-11-15 |
DE68928552T2 (de) | 1998-08-27 |
KR890017805A (ko) | 1989-12-18 |
JPH01283952A (ja) | 1989-11-15 |
KR0129128B1 (ko) | 1998-04-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |