DE68926652D1 - Halbleiterpackung ohne Montierungsfläche - Google Patents

Halbleiterpackung ohne Montierungsfläche

Info

Publication number
DE68926652D1
DE68926652D1 DE68926652T DE68926652T DE68926652D1 DE 68926652 D1 DE68926652 D1 DE 68926652D1 DE 68926652 T DE68926652 T DE 68926652T DE 68926652 T DE68926652 T DE 68926652T DE 68926652 D1 DE68926652 D1 DE 68926652D1
Authority
DE
Germany
Prior art keywords
mounting surface
semiconductor package
package
semiconductor
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68926652T
Other languages
English (en)
Other versions
DE68926652T2 (de
Inventor
Israel Arnold Lesk
George Wayne Hawkins
Ronald E Thomas
William Leslie Hunter
Michael B Mcshane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of DE68926652D1 publication Critical patent/DE68926652D1/de
Application granted granted Critical
Publication of DE68926652T2 publication Critical patent/DE68926652T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
DE68926652T 1988-10-24 1989-10-23 Halbleiterpackung ohne Montierungsfläche Expired - Fee Related DE68926652T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/261,439 US4924291A (en) 1988-10-24 1988-10-24 Flagless semiconductor package

Publications (2)

Publication Number Publication Date
DE68926652D1 true DE68926652D1 (de) 1996-07-18
DE68926652T2 DE68926652T2 (de) 1997-01-02

Family

ID=22993303

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68926652T Expired - Fee Related DE68926652T2 (de) 1988-10-24 1989-10-23 Halbleiterpackung ohne Montierungsfläche

Country Status (7)

Country Link
US (1) US4924291A (de)
EP (1) EP0366386B1 (de)
JP (1) JP2756597B2 (de)
KR (1) KR100194848B1 (de)
DE (1) DE68926652T2 (de)
HK (1) HK1003814A1 (de)
SG (1) SG47798A1 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2890662B2 (ja) * 1990-04-25 1999-05-17 ソニー株式会社 樹脂封止型半導体装置の製造方法とそれに用いるリードフレーム
DE4021871C2 (de) * 1990-07-09 1994-07-28 Lsi Logic Products Gmbh Hochintegriertes elektronisches Bauteil
US5177032A (en) * 1990-10-24 1993-01-05 Micron Technology, Inc. Method for attaching a semiconductor die to a leadframe using a thermoplastic covered carrier tape
US5140404A (en) * 1990-10-24 1992-08-18 Micron Technology, Inc. Semiconductor device manufactured by a method for attaching a semiconductor die to a leadframe using a thermoplastic covered carrier tape
US5214846A (en) * 1991-04-24 1993-06-01 Sony Corporation Packaging of semiconductor chips
US5278442A (en) * 1991-07-15 1994-01-11 Prinz Fritz B Electronic packages and smart structures formed by thermal spray deposition
US5307519A (en) * 1992-03-02 1994-04-26 Motorola, Inc. Circuit with built-in heat sink
EP0566872A3 (en) * 1992-04-21 1994-05-11 Motorola Inc A thermally enhanced semiconductor device and method for making the same
US5233222A (en) * 1992-07-27 1993-08-03 Motorola, Inc. Semiconductor device having window-frame flag with tapered edge in opening
DE4231705C2 (de) * 1992-09-22 1998-04-30 Siemens Ag Halbleitervorrichtung mit einem Systemträger und einem damit verbundenen Halbleiterchip sowie Verfahren zu deren Herstellung
TW276357B (de) * 1993-03-22 1996-05-21 Motorola Inc
US5327008A (en) * 1993-03-22 1994-07-05 Motorola Inc. Semiconductor device having universal low-stress die support and method for making the same
US5506445A (en) * 1994-06-24 1996-04-09 Hewlett-Packard Company Optical transceiver module
US5714792A (en) * 1994-09-30 1998-02-03 Motorola, Inc. Semiconductor device having a reduced die support area and method for making the same
US5683944A (en) * 1995-09-01 1997-11-04 Motorola, Inc. Method of fabricating a thermally enhanced lead frame
DE19717780A1 (de) * 1996-05-01 1997-11-13 Nat Semiconductor Corp Leiterrahmen für eine Halbleiterkomponente
US6201186B1 (en) 1998-06-29 2001-03-13 Motorola, Inc. Electronic component assembly and method of making the same
SG92624A1 (en) 1999-02-09 2002-11-19 Inst Of Microelectronics Lead frame for an integrated circuit chip (integrated circuit peripheral support)
SG91808A1 (en) 1999-02-09 2002-10-15 Inst Of Microelectronics Lead frame for an integrated circuit chip (small window)
JP4349541B2 (ja) 2000-05-09 2009-10-21 大日本印刷株式会社 樹脂封止型半導体装置用フレーム
US6480385B2 (en) * 2000-09-13 2002-11-12 Intel Corporation Electronic assembly and cooling thereof
US6465890B1 (en) * 2000-11-28 2002-10-15 National Semiconductor Corporation Integrated circuit package having offset segmentation of package power and/or ground planes and methods for reducing delamination in integrated circuit packages
EP1473763A1 (de) * 2003-04-30 2004-11-03 STMicroelectronics S.r.l. Herstellungsverfahren für einen Leiterrahmen für Leistungshalbleiter-bauelemente, wobei in einem Schritt die Leiter getrennt werden und der Chipträger vertikal versetzt wird
US7012324B2 (en) * 2003-09-12 2006-03-14 Freescale Semiconductor, Inc. Lead frame with flag support structure
US8106487B2 (en) 2008-12-23 2012-01-31 Pratt & Whitney Rocketdyne, Inc. Semiconductor device having an inorganic coating layer applied over a junction termination extension

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3902148A (en) * 1970-11-27 1975-08-26 Signetics Corp Semiconductor lead structure and assembly and method for fabricating same
US3716761A (en) * 1972-05-03 1973-02-13 Microsystems Int Ltd Universal interconnection structure for microelectronic devices
DE2814477A1 (de) * 1978-04-04 1979-10-18 Siemens Ag Halbleiterbauelement
FR2456390A1 (fr) * 1979-05-11 1980-12-05 Thomson Csf Grille d'encapsulation, microboitier de circuit electronique utilisant cette grille et procede d'encapsulation de circuit electronique en microboitier
JPS57207356A (en) * 1981-06-15 1982-12-20 Fujitsu Ltd Semiconductor device
US4466183A (en) * 1982-05-03 1984-08-21 National Semiconductor Corporation Integrated circuit packaging process
JPS59181025A (ja) * 1983-03-31 1984-10-15 Toshiba Corp 半導体装置
JPS59207645A (ja) * 1983-05-11 1984-11-24 Toshiba Corp 半導体装置およびリ−ドフレ−ム
US4489465A (en) * 1983-05-27 1984-12-25 Jack Lemkin Security fastener
US4595945A (en) * 1983-10-21 1986-06-17 At&T Bell Laboratories Plastic package with lead frame crossunder
US4680613A (en) * 1983-12-01 1987-07-14 Fairchild Semiconductor Corporation Low impedance package for integrated circuit die
US4612564A (en) * 1984-06-04 1986-09-16 At&T Bell Laboratories Plastic integrated circuit package
CA1238119A (en) * 1985-04-18 1988-06-14 Douglas W. Phelps, Jr. Packaged semiconductor chip
US4774635A (en) * 1986-05-27 1988-09-27 American Telephone And Telegraph Company At&T Bell Laboratories Semiconductor package with high density I/O lead connection
JPS6382950U (de) * 1986-11-17 1988-05-31
JPS63240055A (ja) * 1987-03-27 1988-10-05 Nec Corp 半導体装置

Also Published As

Publication number Publication date
SG47798A1 (en) 1998-04-17
EP0366386B1 (de) 1996-06-12
US4924291A (en) 1990-05-08
JPH02130865A (ja) 1990-05-18
DE68926652T2 (de) 1997-01-02
JP2756597B2 (ja) 1998-05-25
EP0366386A3 (de) 1991-02-06
KR100194848B1 (ko) 1999-06-15
HK1003814A1 (en) 1998-11-06
KR900007094A (ko) 1990-05-09
EP0366386A2 (de) 1990-05-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee