DE68926392T2 - Planarisationsmethode für IC-Struktur - Google Patents
Planarisationsmethode für IC-StrukturInfo
- Publication number
- DE68926392T2 DE68926392T2 DE68926392T DE68926392T DE68926392T2 DE 68926392 T2 DE68926392 T2 DE 68926392T2 DE 68926392 T DE68926392 T DE 68926392T DE 68926392 T DE68926392 T DE 68926392T DE 68926392 T2 DE68926392 T2 DE 68926392T2
- Authority
- DE
- Germany
- Prior art keywords
- planarizing
- layer
- low melting
- carried out
- melting inorganic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
- H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
- H01L21/31055—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76819—Smoothing of the dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US26950888A | 1988-11-10 | 1988-11-10 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68926392D1 DE68926392D1 (de) | 1996-06-05 |
DE68926392T2 true DE68926392T2 (de) | 1996-08-14 |
Family
ID=23027564
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68926344T Expired - Fee Related DE68926344T2 (de) | 1988-11-10 | 1989-10-24 | Planarisationsmethode für IC-Struktur |
DE68926392T Expired - Fee Related DE68926392T2 (de) | 1988-11-10 | 1989-10-24 | Planarisationsmethode für IC-Struktur |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68926344T Expired - Fee Related DE68926344T2 (de) | 1988-11-10 | 1989-10-24 | Planarisationsmethode für IC-Struktur |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0368504A3 (de) |
JP (1) | JPH02199831A (de) |
AT (2) | ATE137358T1 (de) |
DE (2) | DE68926344T2 (de) |
ES (2) | ES2088958T3 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04505035A (ja) * | 1989-02-21 | 1992-09-03 | ラム・リサーチ・コーポレーション | 新規なガラスの蒸着時の粘弾性流動法 |
JPH0774146A (ja) * | 1990-02-09 | 1995-03-17 | Applied Materials Inc | 低融点無機材料を使用する集積回路構造の改良された平坦化方法 |
JP3092185B2 (ja) * | 1990-07-30 | 2000-09-25 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
KR0182006B1 (ko) * | 1995-11-10 | 1999-04-15 | 김광호 | 반도체 패키지 장치 및 몰딩물질에 의해 발생하는 기생용량의 산출방법 |
KR102391994B1 (ko) * | 2017-08-14 | 2022-04-28 | 삼성디스플레이 주식회사 | 멀티 스택 접합체, 멀티 스택 접합체의 제조 방법 및 멀티 스택 접합체를 포함하는 표시 장치 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2961350A (en) * | 1958-04-28 | 1960-11-22 | Bell Telephone Labor Inc | Glass coating of circuit elements |
US3755720A (en) * | 1972-09-25 | 1973-08-28 | Rca Corp | Glass encapsulated semiconductor device |
DE2713647C2 (de) * | 1977-03-28 | 1984-11-29 | Tokyo Shibaura Electric Co., Ltd., Kawasaki, Kanagawa | Halbleitervorrichtung, bestehend aus einem Halbleitersubstrat und aus einem Oberflächenschutzfilm |
DE3072040D1 (en) * | 1979-07-23 | 1987-11-05 | Fujitsu Ltd | Method of manufacturing a semiconductor device wherein first and second layers are formed |
JPS5648140A (en) * | 1979-09-27 | 1981-05-01 | Seiko Epson Corp | Manufacture of semiconductor device |
CA1165014A (en) * | 1981-04-13 | 1984-04-03 | Kei Kurosawa | Method for manufacturing semiconductor device |
JPS5834945A (ja) * | 1981-08-26 | 1983-03-01 | Nippon Telegr & Teleph Corp <Ntt> | 多層配線構造体 |
JPS58190043A (ja) * | 1982-04-30 | 1983-11-05 | Seiko Epson Corp | 多層配線法 |
JPS58210634A (ja) * | 1982-05-31 | 1983-12-07 | Toshiba Corp | 半導体装置の製造方法 |
JPS62169442A (ja) * | 1986-01-22 | 1987-07-25 | Nec Corp | 素子分離領域の形成方法 |
-
1989
- 1989-10-24 AT AT90203417T patent/ATE137358T1/de not_active IP Right Cessation
- 1989-10-24 ES ES90203418T patent/ES2088958T3/es not_active Expired - Lifetime
- 1989-10-24 DE DE68926344T patent/DE68926344T2/de not_active Expired - Fee Related
- 1989-10-24 EP EP19890310921 patent/EP0368504A3/de not_active Withdrawn
- 1989-10-24 DE DE68926392T patent/DE68926392T2/de not_active Expired - Fee Related
- 1989-10-24 ES ES90203417T patent/ES2088957T3/es not_active Expired - Lifetime
- 1989-10-24 AT AT90203418T patent/ATE137608T1/de not_active IP Right Cessation
- 1989-11-07 JP JP1289850A patent/JPH02199831A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0368504A2 (de) | 1990-05-16 |
JPH02199831A (ja) | 1990-08-08 |
ATE137358T1 (de) | 1996-05-15 |
ES2088958T3 (es) | 1996-10-01 |
DE68926344D1 (de) | 1996-05-30 |
ES2088957T3 (es) | 1996-10-01 |
ATE137608T1 (de) | 1996-05-15 |
DE68926392D1 (de) | 1996-06-05 |
EP0368504A3 (de) | 1990-09-12 |
DE68926344T2 (de) | 1996-09-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |