DE68922767T2 - Verbindungsstruktur zum Verbinden von Leitern in einem elektronischen Apparat. - Google Patents

Verbindungsstruktur zum Verbinden von Leitern in einem elektronischen Apparat.

Info

Publication number
DE68922767T2
DE68922767T2 DE68922767T DE68922767T DE68922767T2 DE 68922767 T2 DE68922767 T2 DE 68922767T2 DE 68922767 T DE68922767 T DE 68922767T DE 68922767 T DE68922767 T DE 68922767T DE 68922767 T2 DE68922767 T2 DE 68922767T2
Authority
DE
Germany
Prior art keywords
connection structure
electronic apparatus
connecting conductors
conductors
electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68922767T
Other languages
English (en)
Other versions
DE68922767D1 (de
Inventor
Nobuyuki Tanaka
Taichi Saitoh
Akio Kiso
Hideo Tokuda
Tetsuya Nakajima
Minoru Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Publication of DE68922767D1 publication Critical patent/DE68922767D1/de
Application granted granted Critical
Publication of DE68922767T2 publication Critical patent/DE68922767T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4824—Pads with extended contours, e.g. grid structure, branch structure, finger structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cold Cathode And The Manufacture (AREA)
DE68922767T 1988-03-18 1989-03-15 Verbindungsstruktur zum Verbinden von Leitern in einem elektronischen Apparat. Expired - Fee Related DE68922767T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6501488 1988-03-18

Publications (2)

Publication Number Publication Date
DE68922767D1 DE68922767D1 (de) 1995-06-29
DE68922767T2 true DE68922767T2 (de) 1995-09-28

Family

ID=13274699

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68922767T Expired - Fee Related DE68922767T2 (de) 1988-03-18 1989-03-15 Verbindungsstruktur zum Verbinden von Leitern in einem elektronischen Apparat.

Country Status (4)

Country Link
US (1) US4975544A (de)
EP (1) EP0333446B1 (de)
KR (1) KR920003316B1 (de)
DE (1) DE68922767T2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5461260A (en) * 1994-08-01 1995-10-24 Motorola Inc. Semiconductor device interconnect layout structure for reducing premature electromigration failure due to high localized current density
JP5165967B2 (ja) * 2007-08-22 2013-03-21 セイコーインスツル株式会社 半導体装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4631569A (en) * 1971-12-22 1986-12-23 Hughes Aircraft Company Means and method of reducing the number of masks utilized in fabricating complex multi-level integrated circuits
JPS58213450A (ja) * 1982-06-04 1983-12-12 Toshiba Corp 半導体装置の多層配線構造
JPS60247940A (ja) * 1984-05-23 1985-12-07 Hitachi Ltd 半導体装置およびその製造方法
DE3431632A1 (de) * 1984-08-29 1986-03-06 Philips Patentverwaltung Gmbh, 2000 Hamburg Halbleiterbauelement
US4789760A (en) * 1985-04-30 1988-12-06 Advanced Micro Devices, Inc. Via in a planarized dielectric and process for producing same

Also Published As

Publication number Publication date
KR920003316B1 (ko) 1992-04-27
DE68922767D1 (de) 1995-06-29
EP0333446B1 (de) 1995-05-24
EP0333446A3 (de) 1991-05-08
KR890015455A (ko) 1989-10-30
US4975544A (en) 1990-12-04
EP0333446A2 (de) 1989-09-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee