DE68915523D1 - Verfahren zur Herstellung eines Silicium-auf-Isolator-Bauelementes unter Verwendung einer verbesserten Verkapselungsschicht. - Google Patents

Verfahren zur Herstellung eines Silicium-auf-Isolator-Bauelementes unter Verwendung einer verbesserten Verkapselungsschicht.

Info

Publication number
DE68915523D1
DE68915523D1 DE68915523T DE68915523T DE68915523D1 DE 68915523 D1 DE68915523 D1 DE 68915523D1 DE 68915523 T DE68915523 T DE 68915523T DE 68915523 T DE68915523 T DE 68915523T DE 68915523 D1 DE68915523 D1 DE 68915523D1
Authority
DE
Germany
Prior art keywords
silicon
manufacturing
encapsulation layer
insulator device
improved encapsulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68915523T
Other languages
English (en)
Other versions
DE68915523T2 (de
Inventor
Helmut Baumgart
Andre Martinez
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE68915523D1 publication Critical patent/DE68915523D1/de
Publication of DE68915523T2 publication Critical patent/DE68915523T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683—Continuous wave laser beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02598—Microstructure monocrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02689—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691—Scanning of a beam
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S117/00—Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
    • Y10S117/903—Dendrite or web or cage technique
    • Y10S117/904—Laser beam
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/152—Single crystal on amorphous substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/154—Solid phase epitaxy

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Optics & Photonics (AREA)
  • Recrystallisation Techniques (AREA)
DE68915523T 1988-12-30 1989-12-21 Verfahren zur Herstellung eines Silicium-auf-Isolator-Bauelementes unter Verwendung einer verbesserten Verkapselungsschicht. Expired - Fee Related DE68915523T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/292,606 US4990464A (en) 1988-12-30 1988-12-30 Method of forming improved encapsulation layer

Publications (2)

Publication Number Publication Date
DE68915523D1 true DE68915523D1 (de) 1994-06-30
DE68915523T2 DE68915523T2 (de) 1994-12-22

Family

ID=23125404

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68915523T Expired - Fee Related DE68915523T2 (de) 1988-12-30 1989-12-21 Verfahren zur Herstellung eines Silicium-auf-Isolator-Bauelementes unter Verwendung einer verbesserten Verkapselungsschicht.

Country Status (5)

Country Link
US (1) US4990464A (de)
EP (1) EP0376400B1 (de)
JP (1) JP2554180B2 (de)
KR (1) KR900010953A (de)
DE (1) DE68915523T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5459346A (en) * 1988-06-28 1995-10-17 Ricoh Co., Ltd. Semiconductor substrate with electrical contact in groove
US5310446A (en) * 1990-01-10 1994-05-10 Ricoh Company, Ltd. Method for producing semiconductor film
US5747389A (en) * 1991-04-30 1998-05-05 Intel Corporation Crack resistant passivation layer
JP3416163B2 (ja) * 1992-01-31 2003-06-16 キヤノン株式会社 半導体基板及びその作製方法
JP2669333B2 (ja) * 1993-12-13 1997-10-27 日本電気株式会社 半導体装置の製造方法
JPH0851103A (ja) * 1994-08-08 1996-02-20 Fuji Electric Co Ltd 薄膜の生成方法
US5895228A (en) * 1996-11-14 1999-04-20 International Business Machines Corporation Encapsulation of organic light emitting devices using Siloxane or Siloxane derivatives
US6259592B1 (en) 1998-11-19 2001-07-10 Applied Materials, Inc. Apparatus for retaining a workpiece upon a workpiece support and method of manufacturing same
US6696360B2 (en) 2001-03-15 2004-02-24 Micron Technology, Inc. Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow
US7096581B2 (en) * 2002-03-06 2006-08-29 Stmicroelectronics, Inc. Method for providing a redistribution metal layer in an integrated circuit
US20040121146A1 (en) * 2002-12-20 2004-06-24 Xiao-Ming He Composite barrier films and method
JP2005079122A (ja) * 2003-08-29 2005-03-24 Rikogaku Shinkokai 結晶性薄膜の作製方法
US20090142875A1 (en) * 2007-11-30 2009-06-04 Applied Materials, Inc. Method of making an improved selective emitter for silicon solar cells
CN104008961A (zh) * 2014-05-27 2014-08-27 复旦大学 一种改善硅晶片机械性能的方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4461670A (en) * 1982-05-03 1984-07-24 At&T Bell Laboratories Process for producing silicon devices
JPS59129418A (ja) * 1983-01-13 1984-07-25 Fujitsu Ltd 半導体装置の製造方法
JPS59158514A (ja) * 1983-02-28 1984-09-08 Hitachi Ltd 半導体装置の製造方法
JPS59205712A (ja) * 1983-04-30 1984-11-21 Fujitsu Ltd 半導体装置の製造方法
US4590130A (en) * 1984-03-26 1986-05-20 General Electric Company Solid state zone recrystallization of semiconductor material on an insulator
JPS6119116A (ja) * 1984-07-05 1986-01-28 Matsushita Electronics Corp 半導体装置の製造方法
JPS61270812A (ja) * 1985-05-22 1986-12-01 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン 半導体装置の製造方法
US4743567A (en) * 1987-08-11 1988-05-10 North American Philips Corp. Method of forming thin, defect-free, monocrystalline layers of semiconductor materials on insulators

Also Published As

Publication number Publication date
DE68915523T2 (de) 1994-12-22
KR900010953A (ko) 1990-07-11
EP0376400A1 (de) 1990-07-04
US4990464A (en) 1991-02-05
EP0376400B1 (de) 1994-05-25
JPH02228023A (ja) 1990-09-11
JP2554180B2 (ja) 1996-11-13

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee