DE60217610D1 - Elektronische Anordnung mit einer Elektrode und ihre Herstellung - Google Patents

Elektronische Anordnung mit einer Elektrode und ihre Herstellung

Info

Publication number
DE60217610D1
DE60217610D1 DE60217610T DE60217610T DE60217610D1 DE 60217610 D1 DE60217610 D1 DE 60217610D1 DE 60217610 T DE60217610 T DE 60217610T DE 60217610 T DE60217610 T DE 60217610T DE 60217610 D1 DE60217610 D1 DE 60217610D1
Authority
DE
Germany
Prior art keywords
electrode
manufacture
electronic assembly
electronic
assembly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60217610T
Other languages
English (en)
Other versions
DE60217610T2 (de
Inventor
Kenji Maruyama
Masao Kondo
Masaki Kurusawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE60217610D1 publication Critical patent/DE60217610D1/de
Publication of DE60217610T2 publication Critical patent/DE60217610T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H01L28/56—Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Ceramic Capacitors (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
DE60217610T 2001-10-26 2002-03-27 Elektronische Anordnung mit einer Elektrode und ihre Herstellung Expired - Fee Related DE60217610T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001329688 2001-10-26
JP2001329688A JP2003133531A (ja) 2001-10-26 2001-10-26 電子装置とその製造方法

Publications (2)

Publication Number Publication Date
DE60217610D1 true DE60217610D1 (de) 2007-03-08
DE60217610T2 DE60217610T2 (de) 2007-10-25

Family

ID=19145544

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60217610T Expired - Fee Related DE60217610T2 (de) 2001-10-26 2002-03-27 Elektronische Anordnung mit einer Elektrode und ihre Herstellung

Country Status (7)

Country Link
US (2) US6744085B2 (de)
EP (1) EP1306889B1 (de)
JP (1) JP2003133531A (de)
KR (1) KR20030035761A (de)
CN (1) CN1212665C (de)
DE (1) DE60217610T2 (de)
TW (1) TW535179B (de)

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* Cited by examiner, † Cited by third party
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US7494927B2 (en) * 2000-05-15 2009-02-24 Asm International N.V. Method of growing electrical conductors
JP2004356313A (ja) * 2003-05-28 2004-12-16 Seiko Epson Corp 半導体装置及びその製造方法
CN100420024C (zh) * 2003-06-06 2008-09-17 富士通株式会社 半导体器件的制造方法
US7884403B2 (en) 2004-03-12 2011-02-08 Japan Science And Technology Agency Magnetic tunnel junction device and memory device including the same
JP2006073648A (ja) 2004-08-31 2006-03-16 Fujitsu Ltd 半導体装置及びその製造方法
US7666773B2 (en) 2005-03-15 2010-02-23 Asm International N.V. Selective deposition of noble metal thin films
US8025922B2 (en) 2005-03-15 2011-09-27 Asm International N.V. Enhanced deposition of noble metals
KR100725081B1 (ko) * 2005-06-14 2007-06-08 후지쯔 가부시끼가이샤 반도체 장치의 제조 방법
US20070014919A1 (en) * 2005-07-15 2007-01-18 Jani Hamalainen Atomic layer deposition of noble metal oxides
JP5211558B2 (ja) * 2007-06-18 2013-06-12 富士通セミコンダクター株式会社 半導体装置の製造方法
US20090087339A1 (en) * 2007-09-28 2009-04-02 Asm Japan K.K. METHOD FOR FORMING RUTHENIUM COMPLEX FILM USING Beta-DIKETONE-COORDINATED RUTHENIUM PRECURSOR
JP4888418B2 (ja) * 2008-02-29 2012-02-29 ソニー株式会社 可変容量素子とその制御方法、電子デバイス及び通信モバイル機器
WO2009122497A1 (ja) 2008-03-31 2009-10-08 富士通マイクロエレクトロニクス株式会社 強誘電体メモリとその製造方法、及び強誘電体キャパシタの製造方法
US8084104B2 (en) * 2008-08-29 2011-12-27 Asm Japan K.K. Atomic composition controlled ruthenium alloy film formed by plasma-enhanced atomic layer deposition
US8133555B2 (en) 2008-10-14 2012-03-13 Asm Japan K.K. Method for forming metal film by ALD using beta-diketone metal complex
US9379011B2 (en) 2008-12-19 2016-06-28 Asm International N.V. Methods for depositing nickel films and for making nickel silicide and nickel germanide
US20110020546A1 (en) * 2009-05-15 2011-01-27 Asm International N.V. Low Temperature ALD of Noble Metals
KR200458200Y1 (ko) * 2010-04-06 2012-01-30 오길식 분해가 어려운 커버 유동식 엘이디 천정등
CN102151526A (zh) * 2010-07-23 2011-08-17 兰州理工大学 调控钙钛矿锰氧化物铁磁转变温度的方法
US8871617B2 (en) 2011-04-22 2014-10-28 Asm Ip Holding B.V. Deposition and reduction of mixed metal oxide thin films
US8866367B2 (en) 2011-10-17 2014-10-21 The United States Of America As Represented By The Secretary Of The Army Thermally oxidized seed layers for the production of {001} textured electrodes and PZT devices and method of making
US9761785B2 (en) 2011-10-17 2017-09-12 The United States Of America As Represented By The Secretary Of The Army Stylo-epitaxial piezoelectric and ferroelectric devices and method of manufacturing
US9607842B1 (en) 2015-10-02 2017-03-28 Asm Ip Holding B.V. Methods of forming metal silicides
US9876018B2 (en) * 2015-12-03 2018-01-23 Micron Technology, Inc. Ferroelectric capacitor, ferroelectric field effect transistor, and method used in forming an electronic component comprising conductive material and ferroelectric material
US10896950B2 (en) * 2017-02-27 2021-01-19 Nxp Usa, Inc. Method and apparatus for a thin film dielectric stack
US10923286B2 (en) 2018-02-21 2021-02-16 Nxp Usa, Inc. Method and apparatus for compensating for high thermal expansion coefficient mismatch of a stacked device
CN115959905B (zh) * 2022-12-07 2023-08-18 南京航空航天大学 一种钛锆酸铅与氧化镁垂直自组装纳米复合介电储能薄膜及其制备方法

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Publication number Priority date Publication date Assignee Title
US5192723A (en) * 1990-09-04 1993-03-09 Nikon Corporation Method of phase transition, method for producing lead niobate-based complex oxide utilizing said phase transition method, and lead niobate-based complex oxide produced by said method
DE69326944T2 (de) * 1992-04-13 2000-03-30 Virginia Tech Intell Prop Stapelelektroden für ferroelektrische vorrichtungen
US5514484A (en) * 1992-11-05 1996-05-07 Fuji Xerox Co., Ltd. Oriented ferroelectric thin film
JPH07153643A (ja) 1993-11-29 1995-06-16 Nissin Electric Co Ltd 積層誘電体素子
JP3460095B2 (ja) * 1994-06-01 2003-10-27 富士通株式会社 強誘電体メモリ
DE4421007A1 (de) * 1994-06-18 1995-12-21 Philips Patentverwaltung Elektronisches Bauteil und Verfahren zu seiner Herstellung
JPH098243A (ja) 1995-06-20 1997-01-10 Matsushita Electron Corp セラミック薄膜と金属電極の接合構造と半導体装置およびその製造方法
KR100199095B1 (ko) * 1995-12-27 1999-06-15 구본준 반도체 메모리 셀의 캐패시터 구조 및 그 제조방법
JP3435966B2 (ja) * 1996-03-13 2003-08-11 株式会社日立製作所 強誘電体素子とその製造方法
CN1234137A (zh) * 1996-08-20 1999-11-03 株式会社日立制作所 氧化物电介质元件的制造方法、采用该元件的存储器及半导体装置
JPH10189887A (ja) * 1996-12-27 1998-07-21 Sanyo Electric Co Ltd 強誘電体用電極及びそれを使用した強誘電体デバイス
JP3974697B2 (ja) * 1997-11-28 2007-09-12 ローム株式会社 キャパシタおよびその製法
US6432793B1 (en) * 1997-12-12 2002-08-13 Micron Technology, Inc. Oxidative conditioning method for metal oxide layer and applications thereof
US6117689A (en) * 1997-12-24 2000-09-12 Texas Instruments Incorporated Stable high-dielectric-constant material electrode and method
US6258459B1 (en) * 1998-04-28 2001-07-10 Tdk Corporation Multilayer thin film
US6815219B2 (en) * 1999-12-27 2004-11-09 Hynix Semiconductor Inc. Fabrication method and structure for ferroelectric nonvolatile memory field effect transistor

Also Published As

Publication number Publication date
TW535179B (en) 2003-06-01
EP1306889B1 (de) 2007-01-17
CN1212665C (zh) 2005-07-27
JP2003133531A (ja) 2003-05-09
US6744085B2 (en) 2004-06-01
DE60217610T2 (de) 2007-10-25
EP1306889A2 (de) 2003-05-02
KR20030035761A (ko) 2003-05-09
US20030080363A1 (en) 2003-05-01
EP1306889A3 (de) 2004-08-18
CN1414636A (zh) 2003-04-30
US7153705B2 (en) 2006-12-26
US20040195605A1 (en) 2004-10-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee