DE60211659D1 - Verfahren und vorrichtung zur diagnose von ausfällen in einer integrierten schaltung unter verwendung von techniken des typs design-for-debug (dfd) - Google Patents

Verfahren und vorrichtung zur diagnose von ausfällen in einer integrierten schaltung unter verwendung von techniken des typs design-for-debug (dfd)

Info

Publication number
DE60211659D1
DE60211659D1 DE60211659T DE60211659T DE60211659D1 DE 60211659 D1 DE60211659 D1 DE 60211659D1 DE 60211659 T DE60211659 T DE 60211659T DE 60211659 T DE60211659 T DE 60211659T DE 60211659 D1 DE60211659 D1 DE 60211659D1
Authority
DE
Germany
Prior art keywords
dfd
debug
dbg
run
cores
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60211659T
Other languages
English (en)
Other versions
DE60211659T2 (de
Inventor
Laung-Terny Wang
Ming-Tung Chang
Shyh-Horng Lin
Hao-Jan Chao
Jachee Lee
Hsin-Po Wang
Xiaoqing Wen
Po-Ching Hsu
Shih-Chia Kao
Meng-Chyi Lin
Sen-Wei Tsai
Chi-Chan Hsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Syntest Technologies Inc
Original Assignee
Syntest Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Syntest Technologies Inc filed Critical Syntest Technologies Inc
Application granted granted Critical
Publication of DE60211659D1 publication Critical patent/DE60211659D1/de
Publication of DE60211659T2 publication Critical patent/DE60211659T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31704—Design for test; Design verification
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31705—Debugging aspects, e.g. using test circuits for debugging, using dedicated debugging test circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)
DE60211659T 2001-03-01 2002-02-28 Verfahren und vorrichtung zur diagnose von ausfällen in einer integrierten schaltung unter verwendung von techniken des typs design-for-debug (dfd) Expired - Lifetime DE60211659T2 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US86214 1993-07-01
US27206401P 2001-03-01 2001-03-01
US272064P 2001-03-01
US10/086,214 US7191373B2 (en) 2001-03-01 2002-02-27 Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques
PCT/US2002/003413 WO2002071567A1 (en) 2001-03-01 2002-02-28 Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (dfd) techniques

Publications (2)

Publication Number Publication Date
DE60211659D1 true DE60211659D1 (de) 2006-06-29
DE60211659T2 DE60211659T2 (de) 2007-04-26

Family

ID=26774484

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60211659T Expired - Lifetime DE60211659T2 (de) 2001-03-01 2002-02-28 Verfahren und vorrichtung zur diagnose von ausfällen in einer integrierten schaltung unter verwendung von techniken des typs design-for-debug (dfd)

Country Status (5)

Country Link
US (2) US7191373B2 (de)
EP (1) EP1364436B1 (de)
AT (1) ATE327587T1 (de)
DE (1) DE60211659T2 (de)
WO (1) WO2002071567A1 (de)

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Publication number Publication date
DE60211659T2 (de) 2007-04-26
EP1364436A1 (de) 2003-11-26
ATE327587T1 (de) 2006-06-15
EP1364436A4 (de) 2005-02-16
US20020138801A1 (en) 2002-09-26
US7191373B2 (en) 2007-03-13
US7284175B2 (en) 2007-10-16
EP1364436B1 (de) 2006-05-24
US20070168803A1 (en) 2007-07-19
WO2002071567A1 (en) 2002-09-12

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