DE60211318T2 - Metal-gate stapel mit einer verbesserten ätzstopschicht durch ionimplantation von metalatomen und verfahren zu dessen herstellung - Google Patents

Metal-gate stapel mit einer verbesserten ätzstopschicht durch ionimplantation von metalatomen und verfahren zu dessen herstellung Download PDF

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Publication number
DE60211318T2
DE60211318T2 DE60211318T DE60211318T DE60211318T2 DE 60211318 T2 DE60211318 T2 DE 60211318T2 DE 60211318 T DE60211318 T DE 60211318T DE 60211318 T DE60211318 T DE 60211318T DE 60211318 T2 DE60211318 T2 DE 60211318T2
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DE
Germany
Prior art keywords
metal
metal layer
layer
tin
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60211318T
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German (de)
English (en)
Other versions
DE60211318D1 (de
Inventor
R. Paul Sunnyvale BESSER
Srikanteswara Wappingers Falls DAKSHINA-MURTHY
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE60211318D1 publication Critical patent/DE60211318D1/de
Publication of DE60211318T2 publication Critical patent/DE60211318T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01318—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/947—Subphotolithographic processing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/949—Energy beam treating radiation resist on semiconductor

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
DE60211318T 2001-03-19 2002-02-06 Metal-gate stapel mit einer verbesserten ätzstopschicht durch ionimplantation von metalatomen und verfahren zu dessen herstellung Expired - Lifetime DE60211318T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/810,348 US6444513B1 (en) 2001-03-19 2001-03-19 Metal gate stack with etch stop layer having implanted metal species
US810348 2001-03-19
PCT/US2002/003556 WO2002075791A2 (en) 2001-03-19 2002-02-06 Metal gate stack with etch stop layer improved through implantation of metallic atoms

Publications (2)

Publication Number Publication Date
DE60211318D1 DE60211318D1 (de) 2006-06-14
DE60211318T2 true DE60211318T2 (de) 2007-05-10

Family

ID=25203650

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60211318T Expired - Lifetime DE60211318T2 (de) 2001-03-19 2002-02-06 Metal-gate stapel mit einer verbesserten ätzstopschicht durch ionimplantation von metalatomen und verfahren zu dessen herstellung

Country Status (9)

Country Link
US (2) US6444513B1 (https=)
EP (1) EP1371088B1 (https=)
JP (1) JP4076862B2 (https=)
KR (1) KR100819193B1 (https=)
CN (1) CN1246883C (https=)
AU (1) AU2002238059A1 (https=)
DE (1) DE60211318T2 (https=)
TW (1) TWI246721B (https=)
WO (1) WO2002075791A2 (https=)

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US6511911B1 (en) * 2001-04-03 2003-01-28 Advanced Micro Devices, Inc. Metal gate stack with etch stop layer
US6815364B2 (en) * 2001-09-28 2004-11-09 Infineon Technologies North America Corp. Tungsten hard mask
US6589858B1 (en) * 2002-06-07 2003-07-08 Advanced Micro Devices, Inc. Method of making metal gate stack with etch endpoint tracer layer
US6734089B1 (en) * 2003-01-16 2004-05-11 Micron Technology Inc Techniques for improving wordline fabrication of a memory device
JP2005012179A (ja) * 2003-05-16 2005-01-13 Seiko Epson Corp 薄膜パターン形成方法、デバイスとその製造方法及び電気光学装置並びに電子機器、アクティブマトリクス基板の製造方法
US7115488B2 (en) * 2003-08-29 2006-10-03 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor device
US7952118B2 (en) * 2003-11-12 2011-05-31 Samsung Electronics Co., Ltd. Semiconductor device having different metal gate structures
US7332439B2 (en) * 2004-09-29 2008-02-19 Intel Corporation Metal gate transistors with epitaxial source and drain regions
JP2007080995A (ja) * 2005-09-13 2007-03-29 Toshiba Corp 半導体装置
US7511984B2 (en) * 2006-08-30 2009-03-31 Micron Technology, Inc. Phase change memory
GB0625004D0 (en) * 2006-12-15 2007-01-24 Nxp Bv Semiconductor device and method of manufacture
KR100953050B1 (ko) * 2007-10-10 2010-04-14 주식회사 하이닉스반도체 비휘발성 메모리 소자 및 그의 제조 방법
US8524588B2 (en) 2008-08-18 2013-09-03 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a single metal that performs N work function and P work function in a high-k/metal gate process
US8211775B1 (en) 2011-03-09 2012-07-03 United Microelectronics Corp. Method of making transistor having metal gate
US8519487B2 (en) 2011-03-21 2013-08-27 United Microelectronics Corp. Semiconductor device
US9852870B2 (en) 2011-05-23 2017-12-26 Corporation For National Research Initiatives Method for the fabrication of electron field emission devices including carbon nanotube field electron emisson devices
US20120313149A1 (en) * 2011-06-09 2012-12-13 Beijing Nmc Co., Ltd. Semiconductor structure and method for manufacturing the same
KR102060834B1 (ko) 2013-07-23 2019-12-30 삼성전자주식회사 반도체 장치 및 그 제조방법
US9455330B2 (en) * 2014-11-21 2016-09-27 International Business Machines Corporation Recessing RMG metal gate stack for forming self-aligned contact
EP3038140B1 (en) 2014-12-22 2017-11-22 IMEC vzw Method for tuning the effective work function of a metal
US9536974B2 (en) * 2015-04-17 2017-01-03 Globalfoundries Inc. FET device with tuned gate work function
DE202015004528U1 (de) * 2015-04-27 2016-07-28 Liebherr-Components Biberach Gmbh Arbeitsmaschine mit leistungsverzweigbarem Antrieb
US10658180B1 (en) 2018-11-01 2020-05-19 International Business Machines Corporation EUV pattern transfer with ion implantation and reduced impact of resist residue

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5403759A (en) * 1992-10-02 1995-04-04 Texas Instruments Incorporated Method of making thin film transistor and a silicide local interconnect
US5618760A (en) * 1994-04-12 1997-04-08 The Board Of Trustees Of The Leland Stanford, Jr. University Method of etching a pattern on a substrate using a scanning probe microscope
KR100248123B1 (ko) * 1997-03-04 2000-03-15 구본준 박막트랜지스터및그의제조방법
TW471049B (en) * 1998-05-22 2002-01-01 United Microelectronics Corp Metal gate structure and manufacturing method for metal oxide semiconductor
KR100532398B1 (ko) * 1998-12-24 2006-01-27 삼성전자주식회사 금속막으로구성된게이트전극을갖는모스트랜지스터
US6383879B1 (en) * 1999-12-03 2002-05-07 Agere Systems Guardian Corp. Semiconductor device having a metal gate with a work function compatible with a semiconductor device
US6444512B1 (en) * 2000-06-12 2002-09-03 Motorola, Inc. Dual metal gate transistors for CMOS process

Also Published As

Publication number Publication date
CN1246883C (zh) 2006-03-22
US6657268B2 (en) 2003-12-02
WO2002075791A2 (en) 2002-09-26
JP4076862B2 (ja) 2008-04-16
JP2004532516A (ja) 2004-10-21
EP1371088A2 (en) 2003-12-17
WO2002075791A3 (en) 2003-03-27
US20020132415A1 (en) 2002-09-19
US20030003645A1 (en) 2003-01-02
CN1503986A (zh) 2004-06-09
US6444513B1 (en) 2002-09-03
KR100819193B1 (ko) 2008-04-04
AU2002238059A1 (en) 2002-10-03
TWI246721B (en) 2006-01-01
KR20030086609A (ko) 2003-11-10
EP1371088B1 (en) 2006-05-10
DE60211318D1 (de) 2006-06-14

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8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: GLOBALFOUNDRIES INC., GRAND CAYMAN, KY

8328 Change in the person/name/address of the agent

Representative=s name: GRUENECKER, KINKELDEY, STOCKMAIR & SCHWANHAEUSSER,