DE602007013318D1 - Halbleiterbauelement - Google Patents

Halbleiterbauelement

Info

Publication number
DE602007013318D1
DE602007013318D1 DE602007013318T DE602007013318T DE602007013318D1 DE 602007013318 D1 DE602007013318 D1 DE 602007013318D1 DE 602007013318 T DE602007013318 T DE 602007013318T DE 602007013318 T DE602007013318 T DE 602007013318T DE 602007013318 D1 DE602007013318 D1 DE 602007013318D1
Authority
DE
Germany
Prior art keywords
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602007013318T
Other languages
English (en)
Inventor
Shunpei Yamazaki
Yasuyuki Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Publication of DE602007013318D1 publication Critical patent/DE602007013318D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772Physical layout of the record carrier
    • G06K19/07728Physical layout of the record carrier the record carrier comprising means for protection against impact or bending, e.g. protective shells or stress-absorbing layers around the integrated circuit
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
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    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/12Supports; Mounting means
    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2208Supports; Mounting means by structural association with other equipment or articles associated with components used in interrogation type services, i.e. in systems for information exchange between an interrogator/reader and a tag/transponder, e.g. in Radio Frequency Identification [RFID] systems
    • H01Q1/2216Supports; Mounting means by structural association with other equipment or articles associated with components used in interrogation type services, i.e. in systems for information exchange between an interrogator/reader and a tag/transponder, e.g. in Radio Frequency Identification [RFID] systems used in interrogator/reader equipment
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    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q23/00Antennas with active circuits or circuit elements integrated within them or attached to them
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    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/481Disposition
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    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
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    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
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    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
DE602007013318T 2006-07-28 2007-07-26 Halbleiterbauelement Active DE602007013318D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006206798 2006-07-28

Publications (1)

Publication Number Publication Date
DE602007013318D1 true DE602007013318D1 (de) 2011-05-05

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US (2) US7838976B2 (de)
EP (1) EP1884889B1 (de)
DE (1) DE602007013318D1 (de)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8232621B2 (en) * 2006-07-28 2012-07-31 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
KR101478810B1 (ko) 2006-07-28 2015-01-02 가부시키가이샤 한도오따이 에네루기 켄큐쇼 축전 장치
JP5050803B2 (ja) * 2007-11-21 2012-10-17 富士通株式会社 Rfidタグおよびrfidタグ製造方法
US9001527B2 (en) * 2008-02-18 2015-04-07 Cyntec Co., Ltd. Electronic package structure
JP4535210B2 (ja) * 2008-05-28 2010-09-01 株式会社村田製作所 無線icデバイス用部品および無線icデバイス
WO2009147547A1 (en) * 2008-06-02 2009-12-10 Nxp B.V. Electronic device and method of manufacturing an electronic device
US8081079B1 (en) * 2008-06-06 2011-12-20 Altera Corporation PLD package with coordinated RFID TAG
US8487435B2 (en) * 2008-09-09 2013-07-16 Triquint Semiconductor, Inc. Sheet-molded chip-scale package
JP2010118555A (ja) * 2008-11-13 2010-05-27 Nec Electronics Corp 半導体装置
CA2771787C (en) * 2009-08-26 2017-07-04 Toppan Printing Co., Ltd. Contactless communication medium
JP5471283B2 (ja) * 2009-10-19 2014-04-16 Tdk株式会社 ワイヤレス給電装置、ワイヤレス受電装置およびワイヤレス電力伝送システム
US8823597B2 (en) * 2010-03-19 2014-09-02 Shanghai IC R & D Center Co., Ltd Multi-system multi-band RFID antenna
WO2011118379A1 (ja) * 2010-03-24 2011-09-29 株式会社村田製作所 Rfidシステム
US20120104103A1 (en) * 2010-10-29 2012-05-03 Nxp B.V. Integrated pcb uhf rfid matching network/antenna
US10381720B2 (en) 2010-12-08 2019-08-13 Nxp B.V. Radio frequency identification (RFID) integrated circuit (IC) and matching network/antenna embedded in surface mount devices (SMD)
KR101153686B1 (ko) * 2010-12-21 2012-06-18 삼성전기주식회사 적층 세라믹 전자부품 제조방법 및 그 제조방법에 의한 적층 세라믹 전자부품
KR101780024B1 (ko) * 2011-10-19 2017-09-20 삼성전자주식회사 안테나-회로기판 패키지
ES2645364T3 (es) 2012-10-29 2017-12-05 Optosys Sa Transpondedor para identificación de objetos y método para su fabricación
KR20150080797A (ko) * 2014-01-02 2015-07-10 삼성전기주식회사 세라믹 전자 부품
DE102014018393A1 (de) * 2014-10-14 2016-04-14 Infineon Technologies Ag Chipkartenmodul-Anordnung, Chipkarten-Anordnung und Verfahren zum Herstellen einer Chipkarten-Anordnung
JP2016162904A (ja) * 2015-03-03 2016-09-05 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
ES2597330B1 (es) * 2015-07-17 2017-10-13 Precintia International, S.A. Procedimiento de fabricación de precintos de seguridad con un chip de identificación incorporado
EP3168787A1 (de) 2015-11-11 2017-05-17 Mastercard International Incorporated Chipkarte
EP3168788A1 (de) * 2015-11-11 2017-05-17 Mastercard International Incorporated Chipkarte
US10762412B2 (en) 2018-01-30 2020-09-01 Composecure, Llc DI capacitive embedded metal card
US10977540B2 (en) 2016-07-27 2021-04-13 Composecure, Llc RFID device
DE102016011750A1 (de) * 2016-09-29 2018-03-29 Ceramtec-Etec Gmbh Datenträger aus Keramik
EP4181017A1 (de) 2017-09-07 2023-05-17 Composecure, LLC Transaktionskarte mit eingebetteten elektronischen komponenten und verfahren zu ihrer herstellung
US11151437B2 (en) 2017-09-07 2021-10-19 Composecure, Llc Metal, ceramic, or ceramic-coated transaction card with window or window pattern and optional backlighting
CN109149068B (zh) * 2018-08-12 2021-04-02 瑞声科技(南京)有限公司 封装天线系统及移动终端
US10321555B1 (en) * 2018-09-04 2019-06-11 Raytheon Company Printed circuit board based RF circuit module
US11410897B2 (en) * 2019-06-27 2022-08-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure having a dielectric layer edge covering circuit carrier
US11756799B1 (en) * 2020-02-04 2023-09-12 Hrl Laboratories, Llc 3D printed ceramic structure with metal traces

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4701427A (en) * 1985-10-17 1987-10-20 Stemcor Corporation Sintered silicon carbide ceramic body of high electrical resistivity
NL8601404A (nl) 1986-05-30 1987-12-16 Papier Plastic Coating Groning Gegevensdragende kaart, werkwijze voor het vervaardigen van een dergelijke kaart en inrichting voor het uitvoeren van deze werkwijze.
JPH025448A (ja) 1988-06-24 1990-01-10 Nec Corp セラミックパッケージ
US5219377A (en) * 1992-01-17 1993-06-15 Texas Instruments Incorporated High temperature co-fired ceramic integrated phased array package
FR2716281B1 (fr) 1994-02-14 1996-05-03 Gemplus Card Int Procédé de fabrication d'une carte sans contact.
US5912200A (en) * 1994-03-30 1999-06-15 Honda Giken Kogyo Kabushiki Kaisha Composite powder and method of manufacturing sintered body therefrom
DE4435802A1 (de) 1994-10-06 1996-04-11 Giesecke & Devrient Gmbh Verfahren zur Herstellung von Datenträgern mit eingebetteten Elementen und Vorrichtung zur Durchführung des Verfahrens
DE19500925C2 (de) 1995-01-16 1999-04-08 Orga Kartensysteme Gmbh Verfahren zur Herstellung einer kontaktlosen Chipkarte
JP3235452B2 (ja) 1995-03-20 2001-12-04 松下電器産業株式会社 高周波集積回路装置
DE19609636C1 (de) 1996-03-12 1997-08-14 Siemens Ag Chipkarte und Verfahren zur Herstellung einer Chipkarte
US5796165A (en) 1996-03-19 1998-08-18 Matsushita Electronics Corporation High-frequency integrated circuit device having a multilayer structure
WO1998006063A1 (fr) 1996-08-02 1998-02-12 Solaic Carte a circuit integre a connexion mixte
JP4108779B2 (ja) 1996-12-27 2008-06-25 ローム株式会社 回路チップ搭載カードおよび回路チップモジュール
US6329213B1 (en) * 1997-05-01 2001-12-11 Micron Technology, Inc. Methods for forming integrated circuits within substrates
JPH1185938A (ja) 1997-07-17 1999-03-30 Denso Corp Icカード
WO2001052184A2 (de) 2000-01-11 2001-07-19 Infineon Technologies Ag Chipkartenanordnung
US6809413B1 (en) * 2000-05-16 2004-10-26 Sandia Corporation Microelectronic device package with an integral window mounted in a recessed lip
JP2001345212A (ja) 2000-05-31 2001-12-14 Tdk Corp 積層電子部品
US6570469B2 (en) * 2000-06-27 2003-05-27 Matsushita Electric Industrial Co., Ltd. Multilayer ceramic device including two ceramic layers with multilayer circuit patterns that can support semiconductor and saw chips
JP2002049901A (ja) 2000-08-02 2002-02-15 Sony Chem Corp Icタグ
US6424315B1 (en) * 2000-08-02 2002-07-23 Amkor Technology, Inc. Semiconductor chip having a radio-frequency identification transceiver
JP4137356B2 (ja) * 2000-09-07 2008-08-20 Tdk株式会社 表面弾性波素子を含む高周波モジュール部品の製造方法
TW562737B (en) * 2000-11-27 2003-11-21 Murata Manufacturing Co Method of manufacturing ceramic multi-layer substrate, and unbaked composite laminated body
US6528875B1 (en) * 2001-04-20 2003-03-04 Amkor Technology, Inc. Vacuum sealed package for semiconductor chip
JP2003100937A (ja) * 2001-09-26 2003-04-04 Hitachi Ltd 高周波モジュール
JP2004102353A (ja) 2002-09-04 2004-04-02 Hitachi Ltd 紙の製造方法及び無線タグの製造方法
JP3767543B2 (ja) * 2002-11-19 2006-04-19 株式会社村田製作所 積層セラミックコンデンサの製造方法
EP1580235A4 (de) * 2002-12-27 2007-05-30 Tdk Corp Harzzusammensetzung, gehärtetes harz, gehärtete harzfolie, laminat, prepreg, elektronisches bauteil und mehrschichtsubstrat
JP4131694B2 (ja) * 2003-10-06 2008-08-13 三洋電機株式会社 積層セラミックス基板及びその製造方法
US7405665B2 (en) * 2003-12-19 2008-07-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, RFID tag and label-like object
JP4705377B2 (ja) * 2004-03-03 2011-06-22 ソニー株式会社 配線基板
FR2868987B1 (fr) * 2004-04-14 2007-02-16 Arjo Wiggins Secutity Sas Soc Structure comportant un dispositif electronique, notamment pour la fabrication d'un document de securite ou de valeur
JP4684730B2 (ja) * 2004-04-30 2011-05-18 シャープ株式会社 高周波半導体装置、送信装置および受信装置
US7615856B2 (en) * 2004-09-01 2009-11-10 Sanyo Electric Co., Ltd. Integrated antenna type circuit apparatus
TWI323901B (en) * 2004-11-26 2010-04-21 Hon Hai Prec Ind Co Ltd Anisotropic conductive material
JP5038634B2 (ja) * 2006-02-16 2012-10-03 Tdk株式会社 ノイズフィルタ及びノイズフィルタの実装構造

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EP1884889A2 (de) 2008-02-06
US7838976B2 (en) 2010-11-23
EP1884889A3 (de) 2008-05-14
US20080023810A1 (en) 2008-01-31
US20110068438A1 (en) 2011-03-24
US8378473B2 (en) 2013-02-19

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