DE602005027028D1 - Herstellungsverfahren für eine Dünnfilmtransistormatrix - Google Patents
Herstellungsverfahren für eine DünnfilmtransistormatrixInfo
- Publication number
- DE602005027028D1 DE602005027028D1 DE602005027028T DE602005027028T DE602005027028D1 DE 602005027028 D1 DE602005027028 D1 DE 602005027028D1 DE 602005027028 T DE602005027028 T DE 602005027028T DE 602005027028 T DE602005027028 T DE 602005027028T DE 602005027028 D1 DE602005027028 D1 DE 602005027028D1
- Authority
- DE
- Germany
- Prior art keywords
- thin film
- manufacturing process
- film transistor
- transistor matrix
- matrix
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000011159 matrix material Substances 0.000 title 1
- 239000010409 thin film Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020040079521A KR101090249B1 (ko) | 2004-10-06 | 2004-10-06 | 박막 트랜지스터 표시판의 제조 방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602005027028D1 true DE602005027028D1 (de) | 2011-05-05 |
Family
ID=36126084
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602005027028T Active DE602005027028D1 (de) | 2004-10-06 | 2005-09-23 | Herstellungsverfahren für eine Dünnfilmtransistormatrix |
Country Status (7)
Country | Link |
---|---|
US (2) | US7425476B2 (de) |
EP (1) | EP1646076B1 (de) |
JP (1) | JP2006108612A (de) |
KR (1) | KR101090249B1 (de) |
CN (1) | CN1767175B (de) |
DE (1) | DE602005027028D1 (de) |
TW (1) | TWI395001B (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20070009321A (ko) * | 2005-07-15 | 2007-01-18 | 삼성전자주식회사 | 박막 트랜지스터 기판 및 이의 제조 방법 |
KR101232061B1 (ko) * | 2006-04-24 | 2013-02-12 | 삼성디스플레이 주식회사 | 금속 배선의 제조 방법 및 표시 기판의 제조 방법 |
KR20080034598A (ko) * | 2006-10-17 | 2008-04-22 | 삼성전자주식회사 | 박막 트랜지스터 표시판의 제조 방법 |
TWI374510B (en) | 2008-04-18 | 2012-10-11 | Au Optronics Corp | Gate driver on array of a display and method of making device of a display |
CN101266951B (zh) * | 2008-05-05 | 2012-02-01 | 友达光电股份有限公司 | 显示装置的栅极驱动电路以及制作显示装置的器件的方法 |
KR101582946B1 (ko) | 2009-12-04 | 2016-01-08 | 삼성디스플레이 주식회사 | 박막 트랜지스터 표시판 및 그 제조 방법 |
KR101750430B1 (ko) * | 2010-11-29 | 2017-06-26 | 삼성디스플레이 주식회사 | 박막 트랜지스터 표시판의 제조 방법 |
KR102063983B1 (ko) * | 2013-06-26 | 2020-02-11 | 엘지디스플레이 주식회사 | 금속 산화물 반도체를 포함하는 박막 트랜지스터 기판 및 그 제조 방법 |
CN103500764B (zh) | 2013-10-21 | 2016-03-30 | 京东方科技集团股份有限公司 | 一种薄膜晶体管及其制备方法、阵列基板、显示器 |
KR102132445B1 (ko) * | 2013-12-31 | 2020-07-09 | 엘지디스플레이 주식회사 | 액정 디스플레이 패널 및 이의 제조 방법 |
KR102423678B1 (ko) * | 2015-09-25 | 2022-07-21 | 삼성디스플레이 주식회사 | 박막 트랜지스터 표시판 및 그 제조 방법 |
CN107134460B (zh) * | 2017-04-11 | 2019-08-02 | 深圳市华星光电半导体显示技术有限公司 | 显示装置及其goa电路 |
JP7063019B2 (ja) * | 2018-03-09 | 2022-05-09 | Tdk株式会社 | 薄膜コンデンサの製造方法及び薄膜コンデンサ |
CN110729197A (zh) * | 2018-06-29 | 2020-01-24 | 中华映管股份有限公司 | 一种半导体薄膜晶体管的制造方法及显示面板 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4231811A (en) * | 1979-09-13 | 1980-11-04 | Intel Corporation | Variable thickness self-aligned photoresist process |
US6287899B1 (en) * | 1998-12-31 | 2001-09-11 | Samsung Electronics Co., Ltd. | Thin film transistor array panels for a liquid crystal display and a method for manufacturing the same |
KR100494683B1 (ko) * | 2000-05-31 | 2005-06-13 | 비오이 하이디스 테크놀로지 주식회사 | 4-마스크를 이용한 박막 트랜지스터 액정표시장치의제조시에 사용하는 할프톤 노광 공정용 포토 마스크 |
JP2002131886A (ja) * | 2000-10-27 | 2002-05-09 | Hitachi Ltd | 半導体装置の製造方法 |
JP2002151381A (ja) * | 2000-11-09 | 2002-05-24 | Nec Kagoshima Ltd | パターン形成方法 |
TW480728B (en) * | 2001-02-02 | 2002-03-21 | Hannstar Display Corp | Polysilicon thin film transistor structure and the manufacturing method thereof |
JP4462775B2 (ja) * | 2001-03-02 | 2010-05-12 | Nec液晶テクノロジー株式会社 | パターン形成方法及びそれを用いた液晶表示装置の製造方法 |
JP3871923B2 (ja) * | 2001-11-26 | 2007-01-24 | 鹿児島日本電気株式会社 | パターン形成方法及びそれを用いたアクティブマトリクス基板の製造方法 |
US7102168B2 (en) * | 2001-12-24 | 2006-09-05 | Samsung Electronics Co., Ltd. | Thin film transistor array panel for display and manufacturing method thereof |
KR100897505B1 (ko) * | 2002-11-19 | 2009-05-15 | 삼성전자주식회사 | 액정 표시 장치의 박막 트랜지스터 기판 및 이의 제조 방법 |
TW579604B (en) * | 2002-12-17 | 2004-03-11 | Ind Tech Res Inst | Method of forming a top-gate type thin film transistor device |
-
2004
- 2004-10-06 KR KR1020040079521A patent/KR101090249B1/ko active IP Right Grant
-
2005
- 2005-01-27 JP JP2005019463A patent/JP2006108612A/ja active Pending
- 2005-07-28 TW TW094125577A patent/TWI395001B/zh not_active IP Right Cessation
- 2005-09-13 CN CN2005101028537A patent/CN1767175B/zh active Active
- 2005-09-23 DE DE602005027028T patent/DE602005027028D1/de active Active
- 2005-09-23 EP EP05108789A patent/EP1646076B1/de not_active Expired - Fee Related
- 2005-10-04 US US11/242,696 patent/US7425476B2/en active Active
-
2008
- 2008-08-15 US US12/192,531 patent/US20080299712A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
CN1767175A (zh) | 2006-05-03 |
TW200612140A (en) | 2006-04-16 |
KR20060030664A (ko) | 2006-04-11 |
EP1646076A1 (de) | 2006-04-12 |
JP2006108612A (ja) | 2006-04-20 |
EP1646076B1 (de) | 2011-03-23 |
US20080299712A1 (en) | 2008-12-04 |
US20060073645A1 (en) | 2006-04-06 |
CN1767175B (zh) | 2011-03-16 |
TWI395001B (zh) | 2013-05-01 |
KR101090249B1 (ko) | 2011-12-06 |
US7425476B2 (en) | 2008-09-16 |
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