DE602004029915D1 - Substrat zur bauelement-bondierung, bauelement-bondiertes substrat und herstellungsverfahren dafür - Google Patents

Substrat zur bauelement-bondierung, bauelement-bondiertes substrat und herstellungsverfahren dafür

Info

Publication number
DE602004029915D1
DE602004029915D1 DE602004029915T DE602004029915T DE602004029915D1 DE 602004029915 D1 DE602004029915 D1 DE 602004029915D1 DE 602004029915 T DE602004029915 T DE 602004029915T DE 602004029915 T DE602004029915 T DE 602004029915T DE 602004029915 D1 DE602004029915 D1 DE 602004029915D1
Authority
DE
Germany
Prior art keywords
substrate
component
manufacturing
method therefor
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004029915T
Other languages
English (en)
Inventor
Hiroki Yokoyama
Yasuko Takeda
Reo Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokuyama Corp
Original Assignee
Tokuyama Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokuyama Corp filed Critical Tokuyama Corp
Publication of DE602004029915D1 publication Critical patent/DE602004029915D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Die Bonding (AREA)
DE602004029915T 2003-08-26 2004-08-17 Substrat zur bauelement-bondierung, bauelement-bondiertes substrat und herstellungsverfahren dafür Active DE602004029915D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2003208783 2003-08-26
JP2004010700 2004-01-19
PCT/JP2004/011775 WO2005020315A1 (ja) 2003-08-26 2004-08-17 素子接合用基板、素子接合基板及びその製造方法

Publications (1)

Publication Number Publication Date
DE602004029915D1 true DE602004029915D1 (de) 2010-12-16

Family

ID=34220644

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004029915T Active DE602004029915D1 (de) 2003-08-26 2004-08-17 Substrat zur bauelement-bondierung, bauelement-bondiertes substrat und herstellungsverfahren dafür

Country Status (7)

Country Link
US (1) US7459794B2 (de)
EP (1) EP1672685B1 (de)
JP (1) JP4979944B2 (de)
KR (1) KR100825354B1 (de)
CN (1) CN100423217C (de)
DE (1) DE602004029915D1 (de)
WO (1) WO2005020315A1 (de)

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WO2005091351A1 (ja) * 2004-03-24 2005-09-29 Tokuyama Corporation 素子接合用基板およびその製造方法
JP2007201420A (ja) * 2005-12-27 2007-08-09 Sharp Corp 半導体発光装置、半導体発光素子、および半導体発光装置の製造方法
JP4745878B2 (ja) * 2006-04-05 2011-08-10 三菱電機株式会社 はんだ皮膜及びそれを用いたはんだ付方法
CN101641785B (zh) * 2006-11-09 2011-07-13 怡得乐Qlp公司 具有延展层的微电路封装体
JP5076912B2 (ja) * 2008-01-08 2012-11-21 富士通株式会社 端子シートの製造方法
US9147812B2 (en) * 2008-06-24 2015-09-29 Cree, Inc. Methods of assembly for a semiconductor light emitting device package
US9166364B2 (en) * 2011-02-14 2015-10-20 Spectrasensors, Inc. Semiconductor laser mounting with intact diffusion barrier layer
JP5724638B2 (ja) * 2011-05-30 2015-05-27 日立金属株式会社 Pbフリーはんだ及びはんだ被覆導体並びにそれを用いた電気部品
CN103907211B (zh) * 2011-10-31 2017-03-15 夏普株式会社 发光装置、照明装置以及发光装置的制造方法
EP2800129A4 (de) * 2011-12-27 2015-07-08 Panasonic Ip Man Co Ltd Verbindungsstruktur
JP6067982B2 (ja) * 2012-03-19 2017-01-25 スタンレー電気株式会社 半導体素子の製造方法
US9709377B2 (en) * 2012-04-23 2017-07-18 Hitachi, Ltd. Strain sensor chip mounting structure, strain sensor chip and method of manufacturing a strain sensor chip mounting structure
DE102013103081A1 (de) * 2013-03-26 2014-10-02 Osram Opto Semiconductors Gmbh Verfahren zum Verbinden von Fügepartnern und Anordnung von Fügepartnern
CN108922959B (zh) * 2013-03-28 2022-07-29 日亚化学工业株式会社 发光装置、及使用发光装置的装置
JP5733486B1 (ja) * 2014-09-09 2015-06-10 千住金属工業株式会社 Cuカラム、Cu核カラム、はんだ継手およびシリコン貫通電極
DE102016112390B4 (de) 2016-07-06 2021-08-12 Infineon Technologies Ag Lötpad und Verfahren zum Verbessern der Lötpadoberfläche
DE102017104276B4 (de) * 2017-03-01 2020-01-16 Osram Opto Semiconductors Gmbh Verfahren zum Befestigen eines Halbleiterchips auf einem Leiterrahmen und elektronisches Bauelement
CN111872596A (zh) * 2020-07-29 2020-11-03 昆山市宏嘉焊锡制造有限公司 一种铟、铅、银、锑低温钎焊料

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JPH05186884A (ja) 1991-03-19 1993-07-27 Mitsubishi Materials Corp 金属製導体箔または金属合金製導体箔およびその製造方法
US5455004A (en) 1993-10-25 1995-10-03 The Indium Corporation Of America Lead-free alloy containing tin, zinc, indium and bismuth
JP3575068B2 (ja) 1994-08-02 2004-10-06 住友電気工業株式会社 平滑なめっき層を有するセラミックスメタライズ基板およびその製造方法
US20020047217A1 (en) * 1995-03-01 2002-04-25 Elke Zakel Metallic undercoating for solder materials
KR980006783A (ko) * 1996-05-13 1998-03-30 이. 힐러 윌리엄 저가의 위상 고정 모터 제어 방법 및 구조
JP2003200288A (ja) 1996-10-09 2003-07-15 Hitachi Ltd Pbフリーはんだ材料及びそれを用いた電子機器
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JP2002373960A (ja) * 2001-06-14 2002-12-26 Tokuyama Corp 素子接合用基板及びその製造方法
JP2003060354A (ja) 2001-08-10 2003-02-28 Multi:Kk 部品内蔵プリント回路板及びその製造方法
KR20030033919A (ko) * 2001-10-25 2003-05-01 동영전자주식회사 납이 함유되어 있지 않은 무연납 합금의 개발
JP3509809B2 (ja) * 2002-04-30 2004-03-22 住友電気工業株式会社 サブマウントおよび半導体装置
US6596621B1 (en) * 2002-05-17 2003-07-22 International Business Machines Corporation Method of forming a lead-free tin-silver-copper based solder alloy on an electronic substrate
JP3882712B2 (ja) * 2002-08-09 2007-02-21 住友電気工業株式会社 サブマウントおよび半導体装置
DE10251658B4 (de) * 2002-11-01 2005-08-25 Atotech Deutschland Gmbh Verfahren zum Verbinden von zur Herstellung von Mikrostrukturbauteilen geeigneten, mikrostrukturierten Bauteillagen sowie Mikrostrukturbauteil
JP4447215B2 (ja) * 2002-12-16 2010-04-07 Necエレクトロニクス株式会社 電子部品
JP4390452B2 (ja) 2002-12-27 2009-12-24 Necエレクトロニクス株式会社 不揮発性メモリの製造方法
US20040155358A1 (en) * 2003-02-07 2004-08-12 Toshitsune Iijima First and second level packaging assemblies and method of assembling package
US7023089B1 (en) * 2004-03-31 2006-04-04 Intel Corporation Low temperature packaging apparatus and method
US20050269385A1 (en) * 2004-06-03 2005-12-08 National Tsing Hua University Soldering method and solder joints formed therein

Also Published As

Publication number Publication date
KR100825354B1 (ko) 2008-04-28
JPWO2005020315A1 (ja) 2007-11-01
US7459794B2 (en) 2008-12-02
JP4979944B2 (ja) 2012-07-18
CN100423217C (zh) 2008-10-01
KR20060086353A (ko) 2006-07-31
EP1672685A4 (de) 2007-08-22
CN1842907A (zh) 2006-10-04
EP1672685B1 (de) 2010-11-03
WO2005020315A1 (ja) 2005-03-03
EP1672685A1 (de) 2006-06-21
US20070001315A1 (en) 2007-01-04

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