DE60220736D1 - Herstellungsverfahren für gebondetes Substrat - Google Patents

Herstellungsverfahren für gebondetes Substrat

Info

Publication number
DE60220736D1
DE60220736D1 DE60220736T DE60220736T DE60220736D1 DE 60220736 D1 DE60220736 D1 DE 60220736D1 DE 60220736 T DE60220736 T DE 60220736T DE 60220736 T DE60220736 T DE 60220736T DE 60220736 D1 DE60220736 D1 DE 60220736D1
Authority
DE
Germany
Prior art keywords
manufacturing process
bonded substrate
bonded
substrate
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60220736T
Other languages
English (en)
Other versions
DE60220736T2 (de
Inventor
Heon Lee
Chung Ching Yang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hewlett Packard Development Co LP
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of DE60220736D1 publication Critical patent/DE60220736D1/de
Application granted granted Critical
Publication of DE60220736T2 publication Critical patent/DE60220736T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Micromachines (AREA)
  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Photovoltaic Devices (AREA)
DE60220736T 2001-03-30 2002-04-02 Herstellungsverfahren für gebondetes Substrat Expired - Lifetime DE60220736T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/823,550 US6537846B2 (en) 2001-03-30 2001-03-30 Substrate bonding using a selenidation reaction
US823550 2001-03-30

Publications (2)

Publication Number Publication Date
DE60220736D1 true DE60220736D1 (de) 2007-08-02
DE60220736T2 DE60220736T2 (de) 2008-03-13

Family

ID=25239072

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60220736T Expired - Lifetime DE60220736T2 (de) 2001-03-30 2002-04-02 Herstellungsverfahren für gebondetes Substrat

Country Status (5)

Country Link
US (1) US6537846B2 (de)
EP (1) EP1246238B1 (de)
JP (1) JP4198375B2 (de)
CN (1) CN1286145C (de)
DE (1) DE60220736T2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6362075B1 (en) * 1999-06-30 2002-03-26 Harris Corporation Method for making a diffused back-side layer on a bonded-wafer with a thick bond oxide
JP2002305293A (ja) * 2001-04-06 2002-10-18 Canon Inc 半導体部材の製造方法及び半導体装置の製造方法
US6960490B2 (en) * 2002-03-14 2005-11-01 Epitactix Pty Ltd. Method and resulting structure for manufacturing semiconductor substrates
AU2002307578A1 (en) * 2002-04-30 2003-12-02 Agency For Science Technology And Research A method of wafer/substrate bonding
JP4575708B2 (ja) * 2003-05-13 2010-11-04 ベクトン・ディキンソン・アンド・カンパニー 生物学的サンプルを精製および脱塩する方法並びに装置
US7176106B2 (en) * 2003-06-13 2007-02-13 Avago Technologies Fiber Ip (Singapore) Pte. Ltd. Wafer bonding using reactive foils for massively parallel micro-electromechanical systems packaging
US7407863B2 (en) 2003-10-07 2008-08-05 Board Of Trustees Of The University Of Illinois Adhesive bonding with low temperature grown amorphous or polycrystalline compound semiconductors
US7026189B2 (en) 2004-02-11 2006-04-11 Hewlett-Packard Development Company, L.P. Wafer packaging and singulation method
US7422962B2 (en) * 2004-10-27 2008-09-09 Hewlett-Packard Development Company, L.P. Method of singulating electronic devices
FR2888402B1 (fr) * 2005-07-06 2007-12-21 Commissariat Energie Atomique Procede d'assemblage de substrats par depot d'une couche mince de collage d'oxyde ou de nitrure et structure ainsi assemblee
KR100829562B1 (ko) 2006-08-25 2008-05-14 삼성전자주식회사 기판 접합 구조를 갖는 반도체 레이저 다이오드 및 그제조방법
US20100109115A1 (en) * 2008-11-03 2010-05-06 Ure Michael J Virtual IC wafers and bonding of constitutent IC films
US8748288B2 (en) 2010-02-05 2014-06-10 International Business Machines Corporation Bonded structure with enhanced adhesion strength
EP2654074B1 (de) 2010-03-31 2016-10-26 EV Group E. Thallner GmbH Verfahren zum permanenten Verbinden zweier Metalloberflächen
US9117948B1 (en) 2012-02-02 2015-08-25 The United States Of America As Represented By The Adminstrator Of National Aeronautics And Space Administration Selenium interlayer for high-efficiency multijunction solar cell
US10736212B2 (en) 2016-05-20 2020-08-04 Ares Materials Inc. Substrates for stretchable electronics and method of manufacture
US10615191B2 (en) 2016-05-20 2020-04-07 Ares Materials Inc. Polymer substrate for flexible electronics microfabrication and methods of use
EP3497714A1 (de) * 2016-08-09 2019-06-19 King Abdullah University Of Science And Technology Halbleiterbauelement mit monolithisch integrierten pmos- und nmos-transistoren
CN107742606B (zh) * 2017-10-30 2024-04-02 桂林电子科技大学 一种键合晶圆的结构及其制备方法
CN110534644B (zh) * 2019-08-30 2021-01-15 华中科技大学 一种双向生长的超晶格相变单元的制备方法及相变存储器

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61182217A (ja) * 1985-02-08 1986-08-14 Toshiba Corp ウエハ接着方法
JPH0472608A (ja) * 1990-05-18 1992-03-06 Toshiba Corp 化合物半導体ウェハの製造方法および製造装置
JP2990036B2 (ja) 1995-02-13 1999-12-13 ティーディーケイ株式会社 光記録媒体およびその製造方法
JPH08316145A (ja) * 1995-05-12 1996-11-29 Fuji Electric Co Ltd 半導体薄膜の成膜方法
US5730852A (en) 1995-09-25 1998-03-24 Davis, Joseph & Negley Preparation of cuxinygazsen (X=0-2, Y=0-2, Z=0-2, N=0-3) precursor films by electrodeposition for fabricating high efficiency solar cells
JP2737748B2 (ja) * 1996-06-21 1998-04-08 日本電気株式会社 化合物半導体の接合方法
FR2751467B1 (fr) * 1996-07-17 1998-10-02 Commissariat Energie Atomique Procede d'assemblage de deux structures et dispositif obtenu par le procede. applications aux microlasers
JP3249408B2 (ja) 1996-10-25 2002-01-21 昭和シェル石油株式会社 薄膜太陽電池の薄膜光吸収層の製造方法及び製造装置
US6036772A (en) 1996-12-30 2000-03-14 Sony Corporation Method for making semiconductor device
US6258620B1 (en) * 1997-10-15 2001-07-10 University Of South Florida Method of manufacturing CIGS photovoltaic devices
US6323417B1 (en) * 1998-09-29 2001-11-27 Lockheed Martin Corporation Method of making I-III-VI semiconductor materials for use in photovoltaic cells
US6468923B1 (en) * 1999-03-26 2002-10-22 Canon Kabushiki Kaisha Method of producing semiconductor member
JP4465745B2 (ja) * 1999-07-23 2010-05-19 ソニー株式会社 半導体積層基板，半導体結晶基板および半導体素子ならびにそれらの製造方法

Also Published As

Publication number Publication date
DE60220736T2 (de) 2008-03-13
CN1379436A (zh) 2002-11-13
JP2003017375A (ja) 2003-01-17
US20030017679A1 (en) 2003-01-23
CN1286145C (zh) 2006-11-22
EP1246238A2 (de) 2002-10-02
EP1246238A3 (de) 2003-11-26
EP1246238B1 (de) 2007-06-20
US6537846B2 (en) 2003-03-25
JP4198375B2 (ja) 2008-12-17

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD DEVELOPMENT CO., L.P., HOUSTON, US

8328 Change in the person/name/address of the agent

Representative=s name: SCHOPPE, ZIMMERMANN, STOECKELER & ZINKLER, 82049 P

8364 No opposition during term of opposition