DE60236944D1 - Herstellungsverfahren für einen anneal-wafer - Google Patents

Herstellungsverfahren für einen anneal-wafer

Info

Publication number
DE60236944D1
DE60236944D1 DE60236944T DE60236944T DE60236944D1 DE 60236944 D1 DE60236944 D1 DE 60236944D1 DE 60236944 T DE60236944 T DE 60236944T DE 60236944 T DE60236944 T DE 60236944T DE 60236944 D1 DE60236944 D1 DE 60236944D1
Authority
DE
Germany
Prior art keywords
manufacturing process
anneal wafer
anneal
wafer
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60236944T
Other languages
English (en)
Inventor
N Kobayashi
M Tamatsuka
T Nagoya
W Qu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Application granted granted Critical
Publication of DE60236944D1 publication Critical patent/DE60236944D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
DE60236944T 2001-08-30 2002-08-23 Herstellungsverfahren für einen anneal-wafer Expired - Lifetime DE60236944D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001260777A JP4633977B2 (ja) 2001-08-30 2001-08-30 アニールウエーハの製造方法及びアニールウエーハ
PCT/JP2002/008516 WO2003021660A1 (fr) 2001-08-30 2002-08-23 Procede de production d'une tranche recuite et tranche recuite

Publications (1)

Publication Number Publication Date
DE60236944D1 true DE60236944D1 (de) 2010-08-19

Family

ID=19087930

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60236944T Expired - Lifetime DE60236944D1 (de) 2001-08-30 2002-08-23 Herstellungsverfahren für einen anneal-wafer

Country Status (8)

Country Link
US (1) US7153785B2 (de)
EP (1) EP1422753B1 (de)
JP (1) JP4633977B2 (de)
KR (1) KR100908415B1 (de)
CN (1) CN100343961C (de)
DE (1) DE60236944D1 (de)
TW (1) TW559956B (de)
WO (1) WO2003021660A1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4646440B2 (ja) * 2001-05-28 2011-03-09 信越半導体株式会社 窒素ドープアニールウエーハの製造方法
TW200818327A (en) 2006-09-29 2008-04-16 Sumco Techxiv Corp Silicon wafer heat treatment method
US8042697B2 (en) 2008-06-30 2011-10-25 Memc Electronic Materials, Inc. Low thermal mass semiconductor wafer support
JP2010040587A (ja) * 2008-07-31 2010-02-18 Covalent Materials Corp シリコンウェーハの製造方法
JP5346744B2 (ja) * 2008-12-26 2013-11-20 ジルトロニック アクチエンゲゼルシャフト シリコンウエハ及びその製造方法
JP5764937B2 (ja) * 2011-01-24 2015-08-19 信越半導体株式会社 シリコン単結晶ウェーハの製造方法
CN102586886A (zh) * 2012-03-10 2012-07-18 天津市环欧半导体材料技术有限公司 一种用于去除硅晶片表面氧沉积物的硅晶片退火方法
US9945048B2 (en) * 2012-06-15 2018-04-17 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and method
JP6418778B2 (ja) 2014-05-07 2018-11-07 信越化学工業株式会社 多結晶シリコン棒、多結晶シリコン棒の製造方法、および、単結晶シリコン
CN104651946B (zh) * 2015-03-19 2017-06-23 太原理工大学 基于硅氢键流密度法的硅波导表面光滑工艺
CN105280491A (zh) * 2015-06-17 2016-01-27 上海超硅半导体有限公司 硅片及制造方法
CN109841513A (zh) * 2017-11-24 2019-06-04 上海新昇半导体科技有限公司 一种晶片及其制造方法、电子装置
CN111406129A (zh) 2017-12-21 2020-07-10 环球晶圆股份有限公司 处理单晶硅铸锭以改善激光散射环状/核状图案的方法
CN115135817B (zh) * 2020-02-19 2023-07-14 环球晶圆日本股份有限公司 半导体硅晶片的制造方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2752799B2 (ja) * 1991-03-27 1998-05-18 三菱マテリアル株式会社 Ｓｏｉ基板の製造方法
JP3503710B2 (ja) * 1994-06-28 2004-03-08 東京エレクトロン株式会社 半導体ウエハの熱処理用搭載治具及び熱処理装置
US5788763A (en) * 1995-03-09 1998-08-04 Toshiba Ceramics Co., Ltd. Manufacturing method of a silicon wafer having a controlled BMD concentration
JP3172389B2 (ja) * 1995-03-09 2001-06-04 東芝セラミックス株式会社 シリコンウエーハの製造方法
JPH08250506A (ja) * 1995-03-10 1996-09-27 Toshiba Ceramics Co Ltd シリコンエピタキシャルウエーハ及びその製造方法
JPH09190954A (ja) * 1996-01-10 1997-07-22 Sumitomo Sitix Corp 半導体基板およびその製造方法
JPH09199438A (ja) * 1996-01-12 1997-07-31 Tokyo Electron Ltd 熱処理用治具
DE69738020T2 (de) * 1996-06-28 2008-07-31 Sumco Corp. Verfahren und anordnung zur thermischen behandlung eines einkristallinischen plättchens, einkristallinisches plättchen und verfahren zur herstellung eines einkristallinischen plättchens
JPH10154713A (ja) * 1996-11-22 1998-06-09 Shin Etsu Handotai Co Ltd シリコンウエーハの熱処理方法およびシリコンウエーハ
US6576064B2 (en) * 1997-07-10 2003-06-10 Sandia Corporation Support apparatus for semiconductor wafer processing
JPH11176822A (ja) * 1997-12-05 1999-07-02 Hitachi Ltd 半導体処理装置
TW589415B (en) * 1998-03-09 2004-06-01 Shinetsu Handotai Kk Method for producing silicon single crystal wafer and silicon single crystal wafer
EP1035236A4 (de) * 1998-08-31 2007-01-10 Shinetsu Handotai Kk Siliziumeinkristallwafer, epitaktischer silizium wafer und verffahren zu dessen herstellung
JP3433678B2 (ja) * 1998-08-31 2003-08-04 信越半導体株式会社 アンチモンドープシリコン単結晶ウエーハ及びエピタキシャルシリコンウエーハ並びにこれらの製造方法
JP3478141B2 (ja) * 1998-09-14 2003-12-15 信越半導体株式会社 シリコンウエーハの熱処理方法及びシリコンウエーハ
DE19952705A1 (de) * 1999-11-02 2001-05-10 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer Halbleiterscheibe mit einer epitaktischen Schicht

Also Published As

Publication number Publication date
US7153785B2 (en) 2006-12-26
US20040192071A1 (en) 2004-09-30
TW559956B (en) 2003-11-01
EP1422753B1 (de) 2010-07-07
EP1422753A1 (de) 2004-05-26
JP2003068746A (ja) 2003-03-07
KR20040029038A (ko) 2004-04-03
WO2003021660A1 (fr) 2003-03-13
CN1547764A (zh) 2004-11-17
JP4633977B2 (ja) 2011-02-16
KR100908415B1 (ko) 2009-07-21
CN100343961C (zh) 2007-10-17
EP1422753A4 (de) 2007-01-24

Similar Documents

Publication Publication Date Title
DE60227481D1 (de) Herstellungsverfahren für komplementäre Transistoren
DE60134954D1 (de) Produktionanordnung für Halbleiter
DE60336429D1 (de) HERSTELLUNGSVERFAHREN FÜR Ta-SPUTTERTARGET
ATE369879T1 (de) Zubereitung für restenoseprophylaxe
DE60238291D1 (de) Wafer-Haltevorrichtung
DE60238871D1 (de) Waferpositionierungsverfahren
EP1811548A4 (de) Halbleiter-wafer-herstellungsverfahren
NO20033902L (no) Fremgangsmåte for fremstilling av mellomdestillater
DE60231928D1 (de) Testverfahren für Halbleiterspeicher
DE60141055D1 (de) Push-Planung für Halbleiterfertigung
DE60333174D1 (de) Herstellungsverfahren für eine sic-monitor-wafer
EP1955813A4 (de) Verfahren zur herstellung eines (110) silizium-wafers
DE60235253D1 (de) Herstellungsverfahren für katalysatorelement
DE60143761D1 (de) Herstellungsverfahren für einen siliziumwafer
DE60200485D1 (de) Herstellungsverfahren für eine Chipantenne
DE60236944D1 (de) Herstellungsverfahren für einen anneal-wafer
DE60220736D1 (de) Herstellungsverfahren für gebondetes Substrat
DE60040128D1 (de) Optischer mikro-ausleger, herstellungsverfahren für einen solchen und mikro-ausleger-halter
DE60114338D1 (de) Herstellungsverfahren für optisches Halbleitermodul
DE10291889D2 (de) Halbleiterchip für die Optoelektronik
DE60222529D1 (de) Herstellungsverfahren für kombinationsimpfstoffe
DE602004024579D1 (de) Herstellungsverfahren für einen siliziumwafer
FI20012508A (fi) Parannettu kartonginvalmistusmenetelmä
DE10190278T1 (de) Herstellungsverfahren für Multi-Gauge-Streifen
EP1548801A4 (de) Verfahren zur herstellung eines halbleiterwafers