DE602004024579D1 - Herstellungsverfahren für einen siliziumwafer - Google Patents

Herstellungsverfahren für einen siliziumwafer

Info

Publication number
DE602004024579D1
DE602004024579D1 DE602004024579T DE602004024579T DE602004024579D1 DE 602004024579 D1 DE602004024579 D1 DE 602004024579D1 DE 602004024579 T DE602004024579 T DE 602004024579T DE 602004024579 T DE602004024579 T DE 602004024579T DE 602004024579 D1 DE602004024579 D1 DE 602004024579D1
Authority
DE
Germany
Prior art keywords
manufacturing
silicon wafer
wafer
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004024579T
Other languages
English (en)
Inventor
Sakae Koyata
Kazushige Takaishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumco Corp
Original Assignee
Sumco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Corp filed Critical Sumco Corp
Publication of DE602004024579D1 publication Critical patent/DE602004024579D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02019—Chemical etching

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Weting (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
DE602004024579T 2003-12-01 2004-10-28 Herstellungsverfahren für einen siliziumwafer Active DE602004024579D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003401657A JP4273943B2 (ja) 2003-12-01 2003-12-01 シリコンウェーハの製造方法
PCT/JP2004/016001 WO2005055301A1 (ja) 2003-12-01 2004-10-28 シリコンウェーハの製造方法

Publications (1)

Publication Number Publication Date
DE602004024579D1 true DE602004024579D1 (de) 2010-01-21

Family

ID=34649983

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004024579T Active DE602004024579D1 (de) 2003-12-01 2004-10-28 Herstellungsverfahren für einen siliziumwafer

Country Status (7)

Country Link
US (1) US7645702B2 (de)
EP (1) EP1699074B1 (de)
JP (1) JP4273943B2 (de)
KR (1) KR100703768B1 (de)
CN (1) CN100435289C (de)
DE (1) DE602004024579D1 (de)
WO (1) WO2005055301A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005175106A (ja) * 2003-12-10 2005-06-30 Sumitomo Mitsubishi Silicon Corp シリコンウェーハの加工方法
JP4954694B2 (ja) * 2006-12-25 2012-06-20 昭和電工株式会社 湿式研磨方法および湿式研磨装置
JP2009302409A (ja) * 2008-06-16 2009-12-24 Sumco Corp 半導体ウェーハの製造方法
JP2010016078A (ja) * 2008-07-02 2010-01-21 Shin Etsu Handotai Co Ltd シリコン単結晶ウェーハ及びシリコン単結晶ウェーハの製造方法並びにシリコン単結晶ウェーハの評価方法
US7925459B2 (en) * 2008-10-16 2011-04-12 Enphase Energy, Inc. Method and apparatus for determining an operating voltage for preventing photovoltaic cell reverse breakdown during power conversion
JP5463570B2 (ja) * 2008-10-31 2014-04-09 Ｓｕｍｃｏ Ｔｅｃｈｘｉｖ株式会社 ウェハ用両頭研削装置および両頭研削方法
EP2421028B1 (de) * 2009-04-13 2015-11-04 SUMCO Corporation Herstellungsverfahren füf epitaktischen siliciumwafer
JP6281537B2 (ja) * 2015-08-07 2018-02-21 信越半導体株式会社 半導体ウェーハの製造方法
CN109285762B (zh) * 2018-09-29 2021-05-04 中国电子科技集团公司第四十六研究所 一种氮化镓外延用硅片边缘加工工艺
CN109545663A (zh) * 2018-12-12 2019-03-29 中国电子科技集团公司第四十六研究所 一种高平坦度的硅腐蚀片加工工艺
CN110561200A (zh) * 2019-08-02 2019-12-13 菲特晶(南京)电子有限公司 一种石英晶片加工工艺

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60197367A (ja) * 1984-03-19 1985-10-05 Toshiba Ceramics Co Ltd 鏡面ウエハの製造方法
JP3202305B2 (ja) 1992-02-17 2001-08-27 信越半導体株式会社 鏡面ウエーハの製造方法及び検査方法
JP2839822B2 (ja) 1993-08-02 1998-12-16 三菱マテリアルシリコン株式会社 高平坦度ウェーハの製造方法
JP3134719B2 (ja) * 1995-06-23 2001-02-13 信越半導体株式会社 半導体ウェーハ研磨用研磨剤及び研磨方法
JPH10135165A (ja) * 1996-10-29 1998-05-22 Komatsu Electron Metals Co Ltd 半導体ウェハの製法
JPH10135164A (ja) * 1996-10-29 1998-05-22 Komatsu Electron Metals Co Ltd 半導体ウェハの製造方法
JPH115564A (ja) * 1997-06-17 1999-01-12 Mitsubishi Motors Corp 車両のサイドメンバ構造
JP3441979B2 (ja) 1997-12-09 2003-09-02 信越半導体株式会社 半導体ウエーハの加工方法および半導体ウエーハ
MY119304A (en) * 1997-12-11 2005-04-30 Shinetsu Handotai Kk Silicon wafer etching method and silicon wafer etchant
JP3358549B2 (ja) * 1998-07-08 2002-12-24 信越半導体株式会社 半導体ウエーハの製造方法ならびにウエーハチャック
US6227944B1 (en) * 1999-03-25 2001-05-08 Memc Electronics Materials, Inc. Method for processing a semiconductor wafer
JP3596405B2 (ja) * 2000-02-10 2004-12-02 三菱住友シリコン株式会社 半導体ウェーハの製造方法
JP2002025950A (ja) 2000-06-30 2002-01-25 Mitsubishi Materials Silicon Corp 半導体ウェーハの製造方法
DE10196115B4 (de) * 2000-04-24 2011-06-16 Sumitomo Mitsubishi Silicon Corp. Verfahren zum Polieren eines Halbleiterwafers
WO2002001616A1 (fr) 2000-06-29 2002-01-03 Shin-Etsu Handotai Co., Ltd. Procede de traitement d'une plaquette de semi-conducteur et plaquette de semi-conducteur
JP2003100701A (ja) * 2001-09-27 2003-04-04 Sumitomo Mitsubishi Silicon Corp シリコンウェーハのエッチング方法及びこの方法を用いたシリコンウェーハの表裏面差別化方法
JP2003229392A (ja) * 2001-11-28 2003-08-15 Shin Etsu Handotai Co Ltd シリコンウエーハの製造方法及びシリコンウエーハ並びにｓｏｉウエーハ
JP2003203890A (ja) * 2002-01-07 2003-07-18 Sumitomo Mitsubishi Silicon Corp シリコンウェーハの製造方法
JP4075426B2 (ja) * 2002-03-22 2008-04-16 株式会社Ｓｕｍｃｏ シリコンウェーハの製造方法
JP4192482B2 (ja) 2002-03-22 2008-12-10 株式会社Ｓｕｍｃｏ シリコンウェーハの製造方法
JP4093793B2 (ja) * 2002-04-30 2008-06-04 信越半導体株式会社 半導体ウエーハの製造方法及びウエーハ

Also Published As

Publication number Publication date
KR20060024801A (ko) 2006-03-17
KR100703768B1 (ko) 2007-04-09
EP1699074A1 (de) 2006-09-06
CN100435289C (zh) 2008-11-19
JP4273943B2 (ja) 2009-06-03
US7645702B2 (en) 2010-01-12
US20070119817A1 (en) 2007-05-31
EP1699074B1 (de) 2009-12-09
CN1816900A (zh) 2006-08-09
WO2005055301A1 (ja) 2005-06-16
EP1699074A4 (de) 2008-06-25
JP2005166809A (ja) 2005-06-23

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