DE602004015687D1 - Verfahren zur Erzeugung reversibler Widerstandsschalter in einem PCMO Dünnfilm aufgetragen auf einer hochkristallinen Keimschicht - Google Patents
Verfahren zur Erzeugung reversibler Widerstandsschalter in einem PCMO Dünnfilm aufgetragen auf einer hochkristallinen KeimschichtInfo
- Publication number
- DE602004015687D1 DE602004015687D1 DE602004015687T DE602004015687T DE602004015687D1 DE 602004015687 D1 DE602004015687 D1 DE 602004015687D1 DE 602004015687 T DE602004015687 T DE 602004015687T DE 602004015687 T DE602004015687 T DE 602004015687T DE 602004015687 D1 DE602004015687 D1 DE 602004015687D1
- Authority
- DE
- Germany
- Prior art keywords
- thin film
- seed layer
- film deposited
- highly crystalline
- reversible resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000002441 reversible effect Effects 0.000 title 1
- 239000010409 thin film Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/31—Material having complex metal oxide, e.g. perovskite structure
Landscapes
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Semiconductor Memories (AREA)
- Chemical Vapour Deposition (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/640,770 US6939724B2 (en) | 2003-08-13 | 2003-08-13 | Method for obtaining reversible resistance switches on a PCMO thin film when integrated with a highly crystallized seed layer |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602004015687D1 true DE602004015687D1 (de) | 2008-09-25 |
Family
ID=33565271
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602004015687T Expired - Lifetime DE602004015687D1 (de) | 2003-08-13 | 2004-06-11 | Verfahren zur Erzeugung reversibler Widerstandsschalter in einem PCMO Dünnfilm aufgetragen auf einer hochkristallinen Keimschicht |
Country Status (7)
Country | Link |
---|---|
US (1) | US6939724B2 (de) |
EP (1) | EP1507297B1 (de) |
JP (1) | JP2005064464A (de) |
KR (1) | KR100587751B1 (de) |
CN (1) | CN1581372A (de) |
DE (1) | DE602004015687D1 (de) |
TW (1) | TWI260352B (de) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6962648B2 (en) * | 2003-09-15 | 2005-11-08 | Global Silicon Net Corp. | Back-biased face target sputtering |
US7538338B2 (en) * | 2004-09-03 | 2009-05-26 | Unity Semiconductor Corporation | Memory using variable tunnel barrier widths |
US20060171200A1 (en) | 2004-02-06 | 2006-08-03 | Unity Semiconductor Corporation | Memory using mixed valence conductive oxides |
US7082052B2 (en) | 2004-02-06 | 2006-07-25 | Unity Semiconductor Corporation | Multi-resistive state element with reactive metal |
US7402456B2 (en) * | 2004-04-23 | 2008-07-22 | Sharp Laboratories Of America, Inc. | PCMO thin film with memory resistance properties |
JP4365737B2 (ja) * | 2004-06-30 | 2009-11-18 | シャープ株式会社 | 可変抵抗素子の駆動方法及び記憶装置 |
US20060081467A1 (en) * | 2004-10-15 | 2006-04-20 | Makoto Nagashima | Systems and methods for magnetron deposition |
US20060081466A1 (en) * | 2004-10-15 | 2006-04-20 | Makoto Nagashima | High uniformity 1-D multiple magnet magnetron source |
US7425504B2 (en) * | 2004-10-15 | 2008-09-16 | 4D-S Pty Ltd. | Systems and methods for plasma etching |
US7029982B1 (en) * | 2004-10-21 | 2006-04-18 | Sharp Laboratories Of America, Inc. | Method of affecting RRAM characteristics by doping PCMO thin films |
US20130082232A1 (en) | 2011-09-30 | 2013-04-04 | Unity Semiconductor Corporation | Multi Layered Conductive Metal Oxide Structures And Methods For Facilitating Enhanced Performance Characteristics Of Two Terminal Memory Cells |
US20070084717A1 (en) * | 2005-10-16 | 2007-04-19 | Makoto Nagashima | Back-biased face target sputtering based high density non-volatile caching data storage |
US20070084716A1 (en) * | 2005-10-16 | 2007-04-19 | Makoto Nagashima | Back-biased face target sputtering based high density non-volatile data storage |
US7098101B1 (en) | 2005-12-07 | 2006-08-29 | Sharp Laboratories Of America, Inc. | Method of forming PrxCa1−xMnO3 thin films having a PrMnO3/CaMnO3 super lattice structure using metalorganic chemical vapor deposition |
US8395199B2 (en) | 2006-03-25 | 2013-03-12 | 4D-S Pty Ltd. | Systems and methods for fabricating self-aligned memory cell |
US7932548B2 (en) | 2006-07-14 | 2011-04-26 | 4D-S Pty Ltd. | Systems and methods for fabricating self-aligned memory cell |
US8454810B2 (en) | 2006-07-14 | 2013-06-04 | 4D-S Pty Ltd. | Dual hexagonal shaped plasma source |
US20080011603A1 (en) * | 2006-07-14 | 2008-01-17 | Makoto Nagashima | Ultra high vacuum deposition of PCMO material |
US8308915B2 (en) | 2006-09-14 | 2012-11-13 | 4D-S Pty Ltd. | Systems and methods for magnetron deposition |
US7379364B2 (en) * | 2006-10-19 | 2008-05-27 | Unity Semiconductor Corporation | Sensing a signal in a two-terminal memory array having leakage current |
US7372753B1 (en) * | 2006-10-19 | 2008-05-13 | Unity Semiconductor Corporation | Two-cycle sensing in a two-terminal memory array having leakage current |
CN100495683C (zh) * | 2007-06-04 | 2009-06-03 | 中国科学院物理研究所 | 一种制作电阻随机存储单元阵列的方法 |
US8227783B2 (en) | 2009-07-13 | 2012-07-24 | Seagate Technology Llc | Non-volatile resistive sense memory with praseodymium calcium manganese oxide |
US8377718B2 (en) * | 2010-11-10 | 2013-02-19 | Micron Technology, Inc. | Methods of forming a crystalline Pr1-xCaxMnO3 (PCMO) material and methods of forming semiconductor device structures comprising crystalline PCMO |
CN103849872B (zh) * | 2014-03-28 | 2016-03-02 | 四川材料与工艺研究所 | 一种利用纳秒脉冲激光熔覆制备涂层的方法及其装置 |
CN108944064B (zh) * | 2018-06-07 | 2021-02-23 | 广州四为科技有限公司 | 调测装置、调测热敏头阻值的方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6204139B1 (en) | 1998-08-25 | 2001-03-20 | University Of Houston | Method for switching the properties of perovskite materials used in thin film resistors |
US6473332B1 (en) * | 2001-04-04 | 2002-10-29 | The University Of Houston System | Electrically variable multi-state resistance computing |
US6759249B2 (en) * | 2002-02-07 | 2004-07-06 | Sharp Laboratories Of America, Inc. | Device and method for reversible resistance change induced by electric pulses in non-crystalline perovskite unipolar programmable memory |
-
2003
- 2003-08-13 US US10/640,770 patent/US6939724B2/en not_active Expired - Lifetime
-
2004
- 2004-06-08 JP JP2004170589A patent/JP2005064464A/ja not_active Withdrawn
- 2004-06-10 TW TW093116713A patent/TWI260352B/zh not_active IP Right Cessation
- 2004-06-11 EP EP04013726A patent/EP1507297B1/de not_active Expired - Fee Related
- 2004-06-11 DE DE602004015687T patent/DE602004015687D1/de not_active Expired - Lifetime
- 2004-06-11 KR KR1020040043062A patent/KR100587751B1/ko active IP Right Grant
- 2004-06-11 CN CNA2004100490276A patent/CN1581372A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
KR20050018583A (ko) | 2005-02-23 |
US6939724B2 (en) | 2005-09-06 |
EP1507297A3 (de) | 2006-04-26 |
EP1507297B1 (de) | 2008-08-13 |
TW200506094A (en) | 2005-02-16 |
TWI260352B (en) | 2006-08-21 |
US20050037520A1 (en) | 2005-02-17 |
CN1581372A (zh) | 2005-02-16 |
KR100587751B1 (ko) | 2006-06-09 |
EP1507297A2 (de) | 2005-02-16 |
JP2005064464A (ja) | 2005-03-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |