DE602004008768T2 - Verfahren, apparat und programmspeicher zum erzeugen des status eines host-bus-adapters - Google Patents

Verfahren, apparat und programmspeicher zum erzeugen des status eines host-bus-adapters Download PDF

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Publication number
DE602004008768T2
DE602004008768T2 DE602004008768T DE602004008768T DE602004008768T2 DE 602004008768 T2 DE602004008768 T2 DE 602004008768T2 DE 602004008768 T DE602004008768 T DE 602004008768T DE 602004008768 T DE602004008768 T DE 602004008768T DE 602004008768 T2 DE602004008768 T2 DE 602004008768T2
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DE
Germany
Prior art keywords
host
bus adapter
status
data
host bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004008768T
Other languages
German (de)
English (en)
Other versions
DE602004008768D1 (de
Inventor
James Chen
Lih-Chung San Jose KUO
Carol San Jose SPANEL
Andrew Dale San Jose WALLS
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE602004008768D1 publication Critical patent/DE602004008768D1/de
Application granted granted Critical
Publication of DE602004008768T2 publication Critical patent/DE602004008768T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Computer And Data Communications (AREA)
  • Bus Control (AREA)
  • Information Transfer Between Computers (AREA)
DE602004008768T 2003-05-14 2004-05-04 Verfahren, apparat und programmspeicher zum erzeugen des status eines host-bus-adapters Expired - Lifetime DE602004008768T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/437,554 US7085859B2 (en) 2003-05-14 2003-05-14 Method, apparatus and program storage device for automatically presenting status from a host bus adapter until an error is detected
US437554 2003-05-14
PCT/GB2004/001910 WO2004102405A2 (en) 2003-05-14 2004-05-04 Method, apparatus and program storage device for providing status from a host bus adapter

Publications (2)

Publication Number Publication Date
DE602004008768D1 DE602004008768D1 (de) 2007-10-18
DE602004008768T2 true DE602004008768T2 (de) 2008-06-12

Family

ID=33417398

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004008768T Expired - Lifetime DE602004008768T2 (de) 2003-05-14 2004-05-04 Verfahren, apparat und programmspeicher zum erzeugen des status eines host-bus-adapters

Country Status (9)

Country Link
US (1) US7085859B2 (https=)
EP (1) EP1625505B1 (https=)
JP (1) JP4979383B2 (https=)
KR (1) KR100968314B1 (https=)
CN (1) CN100390768C (https=)
AT (1) ATE372553T1 (https=)
DE (1) DE602004008768T2 (https=)
TW (1) TWI259368B (https=)
WO (1) WO2004102405A2 (https=)

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* Cited by examiner, † Cited by third party
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US7149823B2 (en) * 2003-08-29 2006-12-12 Emulex Corporation System and method for direct memory access from host without processor intervention wherein automatic access to memory during host start up does not occur
US20080195896A1 (en) * 2007-02-14 2008-08-14 International Business Machines Corporation Apparratus and method for universal programmable error detection and real time error detection
US8225019B2 (en) * 2008-09-22 2012-07-17 Micron Technology, Inc. SATA mass storage device emulation on a PCIe interface
US9086992B1 (en) 2012-06-08 2015-07-21 Digital Ordnance Storage, Inc. System and method for interconnecting storage elements
DE102014207417A1 (de) * 2014-04-17 2015-10-22 Robert Bosch Gmbh Schnittstelleneinheit
US10445105B2 (en) * 2018-01-29 2019-10-15 Pixart Imaging Inc. Scheme for automatically controlling dongle device and/or electronic device to enter waiting state of device pairing in which the dongle device and the electronic device exchange/share pairing information

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JPH0786828B2 (ja) 1985-05-20 1995-09-20 富士通株式会社 遠隔制御方式
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US4858234A (en) * 1987-09-04 1989-08-15 Digital Equipment Corporation Method and apparatus for error recovery in a multibus computer system
JP2706093B2 (ja) * 1988-06-14 1998-01-28 富士通株式会社 エラー処理方式
JPH07104821B2 (ja) * 1988-08-22 1995-11-13 富士通株式会社 データ転送制御方式
JP2723604B2 (ja) * 1989-04-14 1998-03-09 日本電気株式会社 データ処理装置
JPH03139748A (ja) * 1989-10-26 1991-06-13 Nec Corp 報告ステータスバイト切換方式
JPH0827705B2 (ja) * 1990-07-25 1996-03-21 インターナショナル・ビジネス・マシーンズ・コーポレイション アダプタ
US5241630A (en) 1990-11-13 1993-08-31 Compaq Computer Corp. Device controller with a separate command path between a host and the device and a separate data path including a first in, first out memory between the host and the device
JPH0588944A (ja) * 1991-09-30 1993-04-09 Nec Corp 情報処理システムの入出力制御監視方式
US5319754A (en) * 1991-10-03 1994-06-07 Compaq Computer Corporation Data transfer system between a computer and a host adapter using multiple arrays
US5297067A (en) * 1991-10-16 1994-03-22 Quantum Corporation Electronic hot connection of disk drive module to computer peripheral bus
US5659690A (en) * 1992-10-15 1997-08-19 Adaptec, Inc. Programmably configurable host adapter integrated circuit including a RISC processor
JPH07248996A (ja) 1994-03-11 1995-09-26 Nec Eng Ltd バスアダプタ
US6016506A (en) * 1994-03-29 2000-01-18 The United States Of America As Represented By The Secretary Of The Navy Non-intrusive SCSI status sensing system
US5657455A (en) * 1994-09-07 1997-08-12 Adaptec, Inc. Status indicator for a host adapter
JPH0934831A (ja) 1995-07-21 1997-02-07 Nec Eng Ltd バスアダプタのデータ転送方式
GB2308904A (en) 1996-01-06 1997-07-09 Earl Walter Roper SCSI bus extension over the ethernet
JPH1083368A (ja) * 1996-09-06 1998-03-31 Canon Inc 通信制御装置および方法
US5918028A (en) * 1997-07-08 1999-06-29 Motorola, Inc. Apparatus and method for smart host bus adapter for personal computer cards
GB9810512D0 (en) * 1998-05-15 1998-07-15 Sgs Thomson Microelectronics Detecting communication errors across a chip boundary
US7181548B2 (en) * 1998-10-30 2007-02-20 Lsi Logic Corporation Command queueing engine
CN1196065C (zh) * 1999-02-23 2005-04-06 株式会社日立制作所 集成电路和使用它的信息处理装置
GB9907254D0 (en) * 1999-03-29 1999-05-26 Sgs Thomson Microelectronics Synchronous data adaptor
US6564271B2 (en) * 1999-06-09 2003-05-13 Qlogic Corporation Method and apparatus for automatically transferring I/O blocks between a host system and a host adapter
US6535936B2 (en) * 1999-06-30 2003-03-18 Adaptec, Inc. SCSI phase status register for use in reducing instructions executed by an on-chip sequencer in asserting a SCSI acknowledge signal and method
US6477601B1 (en) * 1999-06-30 2002-11-05 Adaptec, Inc. SCSI bus free phase management structure and method of operation for parallel SCSI host adapter integrated circuits
US6502156B1 (en) * 1999-12-27 2002-12-31 Intel Corporation Controlling I/O devices independently of a host processor
JP2001202295A (ja) * 2000-01-17 2001-07-27 Hitachi Ltd サブシステム
US7003617B2 (en) * 2003-02-11 2006-02-21 Dell Products L.P. System and method for managing target resets

Also Published As

Publication number Publication date
TWI259368B (en) 2006-08-01
ATE372553T1 (de) 2007-09-15
US7085859B2 (en) 2006-08-01
EP1625505B1 (en) 2007-09-05
JP2007513394A (ja) 2007-05-24
CN1751298A (zh) 2006-03-22
US20040230727A1 (en) 2004-11-18
JP4979383B2 (ja) 2012-07-18
WO2004102405A3 (en) 2005-03-24
WO2004102405A2 (en) 2004-11-25
CN100390768C (zh) 2008-05-28
KR100968314B1 (ko) 2010-07-08
KR20060009241A (ko) 2006-01-31
EP1625505A2 (en) 2006-02-15
DE602004008768D1 (de) 2007-10-18
TW200517839A (en) 2005-06-01

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Legal Events

Date Code Title Description
8381 Inventor (new situation)

Inventor name: SPANEL, CAROL, SAN JOSE, CA 95119, US

Inventor name: KUO, LIH-CHUNG, SAN JOSE, CA 95133, US

Inventor name: CHEN, JAMES, HAMPSHIRE SO21 2 JN, GB

Inventor name: WALLS, ANDREW DALE, SAN JOSE, CA 95139, US

8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)