DE60016061D1 - Abgeschirmte Bitleitungen für statischen Ramspeicher - Google Patents

Abgeschirmte Bitleitungen für statischen Ramspeicher

Info

Publication number
DE60016061D1
DE60016061D1 DE60016061T DE60016061T DE60016061D1 DE 60016061 D1 DE60016061 D1 DE 60016061D1 DE 60016061 T DE60016061 T DE 60016061T DE 60016061 T DE60016061 T DE 60016061T DE 60016061 D1 DE60016061 D1 DE 60016061D1
Authority
DE
Germany
Prior art keywords
bit lines
ram memory
static ram
shielded bit
shielded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60016061T
Other languages
English (en)
Other versions
DE60016061T2 (de
Inventor
Kevin John O'connor
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Lucent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Application granted granted Critical
Publication of DE60016061D1 publication Critical patent/DE60016061D1/de
Publication of DE60016061T2 publication Critical patent/DE60016061T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/14—Word line organisation; Word line lay-out
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE60016061T 1999-02-10 2000-01-31 Abgeschirmte Bitleitungen für statischen Ramspeicher Expired - Lifetime DE60016061T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US247633 1999-02-10
US09/247,633 US5966317A (en) 1999-02-10 1999-02-10 Shielded bitlines for static RAMs

Publications (2)

Publication Number Publication Date
DE60016061D1 true DE60016061D1 (de) 2004-12-30
DE60016061T2 DE60016061T2 (de) 2005-11-03

Family

ID=22935681

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60016061T Expired - Lifetime DE60016061T2 (de) 1999-02-10 2000-01-31 Abgeschirmte Bitleitungen für statischen Ramspeicher

Country Status (5)

Country Link
US (1) US5966317A (de)
EP (1) EP1028431B1 (de)
JP (2) JP2000236029A (de)
KR (1) KR100688738B1 (de)
DE (1) DE60016061T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11328967A (ja) * 1998-05-14 1999-11-30 Fujitsu Ltd 半導体記憶装置
US6262911B1 (en) 2000-06-22 2001-07-17 International Business Machines Corporation Method to statically balance SOI parasitic effects, and eight device SRAM cells using same
TW522546B (en) * 2000-12-06 2003-03-01 Mitsubishi Electric Corp Semiconductor memory
JP4083977B2 (ja) * 2000-12-20 2008-04-30 富士通株式会社 半導体集積回路及び配線決定方法
JP4278338B2 (ja) * 2002-04-01 2009-06-10 株式会社ルネサステクノロジ 半導体記憶装置
CN100520955C (zh) * 2002-09-12 2009-07-29 松下电器产业株式会社 存储装置
US20040070008A1 (en) * 2002-10-09 2004-04-15 Sun Microsystems, Inc. High speed dual-port memory cell having capacitive coupling isolation and layout design
JP4416428B2 (ja) * 2003-04-30 2010-02-17 株式会社ルネサステクノロジ 半導体記憶装置
US20050253287A1 (en) * 2004-05-11 2005-11-17 Taiwan Semiconductor Manufacturing Co., Ltd. Dual-port SRAM cell structure
DE102005021825A1 (de) * 2005-05-11 2006-11-16 Infineon Technologies Ag Halbleiterspeichervorrichtung mit verbesserter Ladungserhaltung durch Bitleitungsabschirmung
KR101231242B1 (ko) * 2005-12-29 2013-02-08 매그나칩 반도체 유한회사 이웃한 비트라인간 캐패시티브 커플링노이즈를 방지한에스램셀
US7577040B2 (en) * 2006-07-18 2009-08-18 Taiwan Semiconductor Manufacturing Co., Ltd. Dual port memory device with reduced coupling effect
JP5362198B2 (ja) 2007-08-31 2013-12-11 ルネサスエレクトロニクス株式会社 半導体装置
JP5648460B2 (ja) * 2010-12-15 2015-01-07 セイコーエプソン株式会社 記憶装置、集積回路装置、及び電子機器
US20140299941A1 (en) * 2013-04-04 2014-10-09 Globalfoundries Inc. Sram cell with reduced voltage droop
EP2824313B1 (de) 2013-07-10 2017-09-06 Continental Automotive GmbH Kraftstoffeinspritzventil für einen Verbrennungsmotor
JP6963994B2 (ja) 2017-12-22 2021-11-10 ルネサスエレクトロニクス株式会社 半導体装置
US11257766B1 (en) 2020-08-21 2022-02-22 Micron Technology, Inc. Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61206254A (ja) * 1985-03-08 1986-09-12 Fujitsu Ltd 半導体記憶装置
JPS6325881A (ja) * 1986-07-17 1988-02-03 Nec Ic Microcomput Syst Ltd 半導体記憶装置
US5523968A (en) * 1988-05-07 1996-06-04 Seiko Epson Corporation IC semiconductor memory devices with maintained stable operation and lower operating current characteristics
JPH03152793A (ja) * 1989-11-09 1991-06-28 Nec Ic Microcomput Syst Ltd 半導体記憶装置
KR940008132B1 (ko) * 1991-11-28 1994-09-03 삼성전자 주식회사 신호선간의 잡음을 억제하는 메모리 소자
JPH08125130A (ja) * 1994-10-26 1996-05-17 Matsushita Electric Ind Co Ltd 半導体集積回路
JP2689945B2 (ja) * 1995-03-30 1997-12-10 日本電気株式会社 半導体記憶装置
JPH097373A (ja) * 1995-06-20 1997-01-10 Oki Electric Ind Co Ltd 半導体記憶装置
JP3154650B2 (ja) * 1995-09-07 2001-04-09 富士通株式会社 半導体装置
JPH09162305A (ja) * 1995-12-08 1997-06-20 Mitsubishi Electric Corp 半導体記憶装置
JP3852729B2 (ja) * 1998-10-27 2006-12-06 富士通株式会社 半導体記憶装置

Also Published As

Publication number Publication date
EP1028431B1 (de) 2004-11-24
US5966317A (en) 1999-10-12
DE60016061T2 (de) 2005-11-03
EP1028431A3 (de) 2001-05-23
KR100688738B1 (ko) 2007-02-28
JP2007194657A (ja) 2007-08-02
KR20000057971A (ko) 2000-09-25
JP5039403B2 (ja) 2012-10-03
JP2000236029A (ja) 2000-08-29
EP1028431A2 (de) 2000-08-16

Similar Documents

Publication Publication Date Title
DE60016061D1 (de) Abgeschirmte Bitleitungen für statischen Ramspeicher
DE60040767D1 (de) Schreibgerät für wassermetachromatische Gegenstände
DE60037174D1 (de) Puffersystem für externen speicherzugriff
NO20006515D0 (no) Datadump-probe for loggeinnretning
DE69933493D1 (de) Zugriffsstruktur für hochintegrierten Festwertspeicher
GB2362729B (en) Memory access debug facility
HK1077104A1 (en) Using direct memory access for performing databaseoperations between two or more machines
DE60031263D1 (de) Umhüllungsverfahren für protokolldateneinheiten
NO20014785L (no) Automatiserte prosesslinjer
NO20012743D0 (no) Websideadgang
DE69841838D1 (de) Bitleitungsanordnung für DRAM
DE69933584D1 (de) Speichervorrichtung für aufzeichnungsträger
GB2367912B (en) Apparatus for testing computer memory
DE69911867D1 (de) Senkvorrichtung für tiefes Wasser
IT251793Y1 (it) Cassetta portaattrezzi
DE59913423D1 (de) Speicherzellenanordnung
DE69938991D1 (de) Datenverarbeitung
DE60003426D1 (de) Statusbits für cachespeicher
DE69924217D1 (de) Puffer-Speicher für mehrere Datenkommunikationskanäle
DE69817312D1 (de) Streckformmaschine
DE59910207D1 (de) Datenbus für mehrere teilnehmer
DE60041234D1 (de) Stecker-Halterung für eine Hörkapsel
DK1137581T3 (da) Tabletæske
DE59910206D1 (de) Datenbus für mehrere teilnehmer
DE60015006D1 (de) Verbindungsschema für Halbleiter-Speicherbauteil

Legal Events

Date Code Title Description
8364 No opposition during term of opposition