DE60000526D1 - Herstellungsverfahren eines Halbleiterspeichers mit Kondensator - Google Patents

Herstellungsverfahren eines Halbleiterspeichers mit Kondensator

Info

Publication number
DE60000526D1
DE60000526D1 DE60000526T DE60000526T DE60000526D1 DE 60000526 D1 DE60000526 D1 DE 60000526D1 DE 60000526 T DE60000526 T DE 60000526T DE 60000526 T DE60000526 T DE 60000526T DE 60000526 D1 DE60000526 D1 DE 60000526D1
Authority
DE
Germany
Prior art keywords
capacitor
manufacturing process
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60000526T
Other languages
English (en)
Other versions
DE60000526T2 (de
Inventor
Tatsunori Kaneoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE60000526D1 publication Critical patent/DE60000526D1/de
Application granted granted Critical
Publication of DE60000526T2 publication Critical patent/DE60000526T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Formation Of Insulating Films (AREA)
DE60000526T 1999-06-03 2000-05-17 Herstellungsverfahren eines Halbleiterspeichers mit Kondensator Expired - Fee Related DE60000526T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11156424A JP2000349175A (ja) 1999-06-03 1999-06-03 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE60000526D1 true DE60000526D1 (de) 2002-11-07
DE60000526T2 DE60000526T2 (de) 2003-05-08

Family

ID=15627455

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60000526T Expired - Fee Related DE60000526T2 (de) 1999-06-03 2000-05-17 Herstellungsverfahren eines Halbleiterspeichers mit Kondensator

Country Status (5)

Country Link
US (3) US6344394B1 (de)
EP (1) EP1058298B1 (de)
JP (1) JP2000349175A (de)
KR (1) KR100373675B1 (de)
DE (1) DE60000526T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000349175A (ja) * 1999-06-03 2000-12-15 Mitsubishi Electric Corp 半導体装置の製造方法
US20020084482A1 (en) * 2000-12-31 2002-07-04 Cetin Kaya Scalable dielectric
JP2003068893A (ja) * 2001-08-28 2003-03-07 Hitachi Ltd 不揮発性記憶素子及び半導体集積回路
JP2003309194A (ja) * 2002-04-18 2003-10-31 Nec Electronics Corp 半導体記憶装置とその製造方法
KR100480914B1 (ko) * 2002-08-05 2005-04-07 주식회사 하이닉스반도체 반도체소자의 캐패시터 제조방법
KR100537277B1 (ko) * 2002-11-27 2005-12-19 주식회사 하이닉스반도체 반도체 소자의 제조 방법
KR100541675B1 (ko) * 2003-04-30 2006-01-11 주식회사 하이닉스반도체 유전막 형성 방법
US6962728B2 (en) * 2003-05-16 2005-11-08 Macronix International Co., Ltd. Method for forming ONO top oxide in NROM structure

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4774197A (en) * 1986-06-17 1988-09-27 Advanced Micro Devices, Inc. Method of improving silicon dioxide
US5304829A (en) 1989-01-17 1994-04-19 Kabushiki Kaisha Toshiba Nonvolatile semiconductor device
JP2761685B2 (ja) * 1991-10-17 1998-06-04 三菱電機株式会社 半導体装置の製造方法
DE69226358T2 (de) * 1992-05-27 1998-11-26 Sgs-Thomson Microelectronics S.R.L., Agrate Brianza, Mailand/Milano EPROM-Zelle mit Dielektricum zwischen Polysiliziumschichten, das leicht in kleinen Dimensionen herstellbar ist
JP2576406B2 (ja) 1994-05-25 1997-01-29 日本電気株式会社 不揮発性メモリ装置およびその製造方法
JP2901493B2 (ja) * 1994-06-27 1999-06-07 日本電気株式会社 半導体記憶装置及びその製造方法
JP3600326B2 (ja) * 1994-09-29 2004-12-15 旺宏電子股▲ふん▼有限公司 不揮発性半導体メモリ装置およびその製造方法
DE69528971D1 (de) * 1995-06-30 2003-01-09 St Microelectronics Srl Herstellungsverfahren eines Schaltkreises, der nichtflüchtige Speicherzellen und Randtransistoren von mindestens zwei unterschiedlichen Typen enthält, und entsprechender IC
JPH09205155A (ja) 1996-01-25 1997-08-05 Sony Corp 半導体記憶装置の製造方法
JP3548834B2 (ja) * 1996-09-04 2004-07-28 沖電気工業株式会社 不揮発性半導体メモリの製造方法
US5780341A (en) * 1996-12-06 1998-07-14 Halo Lsi Design & Device Technology, Inc. Low voltage EEPROM/NVRAM transistors and making method
US6133093A (en) * 1998-01-30 2000-10-17 Motorola, Inc. Method for forming an integrated circuit
US6204142B1 (en) * 1998-08-24 2001-03-20 Micron Technology, Inc. Methods to form electronic devices
US6114258A (en) * 1998-10-19 2000-09-05 Applied Materials, Inc. Method of oxidizing a substrate in the presence of nitride and oxynitride films
US6171900B1 (en) * 1999-04-15 2001-01-09 Taiwan Semiconductor Manufacturing Company CVD Ta2O5/oxynitride stacked gate insulator with TiN gate electrode for sub-quarter micron MOSFET
JP2000349175A (ja) * 1999-06-03 2000-12-15 Mitsubishi Electric Corp 半導体装置の製造方法
US6248628B1 (en) * 1999-10-25 2001-06-19 Advanced Micro Devices Method of fabricating an ONO dielectric by nitridation for MNOS memory cells

Also Published As

Publication number Publication date
JP2000349175A (ja) 2000-12-15
US6344394B1 (en) 2002-02-05
KR20010014955A (ko) 2001-02-26
EP1058298B1 (de) 2002-10-02
US6605503B2 (en) 2003-08-12
EP1058298A1 (de) 2000-12-06
DE60000526T2 (de) 2003-05-08
US20020090782A1 (en) 2002-07-11
US20020197791A1 (en) 2002-12-26
US6448189B1 (en) 2002-09-10
KR100373675B1 (ko) 2003-02-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee