DE3888628D1 - Halbleiterspeicheranordnungen mit Pegelumformern. - Google Patents
Halbleiterspeicheranordnungen mit Pegelumformern.Info
- Publication number
- DE3888628D1 DE3888628D1 DE88310060T DE3888628T DE3888628D1 DE 3888628 D1 DE3888628 D1 DE 3888628D1 DE 88310060 T DE88310060 T DE 88310060T DE 3888628 T DE3888628 T DE 3888628T DE 3888628 D1 DE3888628 D1 DE 3888628D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor memory
- memory devices
- level converters
- converters
- level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/06—Address interface arrangements, e.g. address buffers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Static Random-Access Memory (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62273481A JPH01117417A (ja) | 1987-10-30 | 1987-10-30 | レベル変換回路 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3888628D1 true DE3888628D1 (de) | 1994-04-28 |
Family
ID=17528510
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE88310060T Expired - Lifetime DE3888628D1 (de) | 1987-10-30 | 1988-10-26 | Halbleiterspeicheranordnungen mit Pegelumformern. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4893274A (de) |
EP (1) | EP0314455B1 (de) |
JP (1) | JPH01117417A (de) |
KR (1) | KR910005598B1 (de) |
DE (1) | DE3888628D1 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0355914A (ja) * | 1989-07-25 | 1991-03-11 | Fujitsu Ltd | 半導体装置 |
JP2556208B2 (ja) * | 1991-03-19 | 1996-11-20 | 富士通株式会社 | レベル変換回路 |
FR2961978B1 (fr) * | 2010-06-25 | 2013-11-22 | St Microelectronics Sa | Circuit bistable en logique cml |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2840329C2 (de) * | 1978-09-15 | 1981-10-15 | Siemens AG, 1000 Berlin und 8000 München | Adreßpuffer in MOS-Technik |
EP0013099B1 (de) * | 1978-12-23 | 1982-02-10 | Fujitsu Limited | Vorrichtung mit integrierter Halbleiterschaltung mit einem, eine Vielheit von Lasten speisenden, Referenzspannungsgenerator |
JPS57150190A (en) * | 1981-02-27 | 1982-09-16 | Hitachi Ltd | Monolithic storage device |
JPS585029A (ja) * | 1981-06-30 | 1983-01-12 | Fujitsu Ltd | レベル変換回路 |
-
1987
- 1987-10-30 JP JP62273481A patent/JPH01117417A/ja active Pending
-
1988
- 1988-10-24 US US07/261,298 patent/US4893274A/en not_active Expired - Fee Related
- 1988-10-26 EP EP88310060A patent/EP0314455B1/de not_active Expired - Lifetime
- 1988-10-26 DE DE88310060T patent/DE3888628D1/de not_active Expired - Lifetime
- 1988-10-29 KR KR1019880014125A patent/KR910005598B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0314455B1 (de) | 1994-03-23 |
JPH01117417A (ja) | 1989-05-10 |
KR910005598B1 (ko) | 1991-07-31 |
EP0314455A2 (de) | 1989-05-03 |
US4893274A (en) | 1990-01-09 |
EP0314455A3 (en) | 1990-12-05 |
KR890007290A (ko) | 1989-06-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de |