DE3875319T2 - Logische schaltung mit bipolar- und cmos-halbleitern und anwendung dieser schaltung bei halbleiterspeicherschaltungen. - Google Patents

Logische schaltung mit bipolar- und cmos-halbleitern und anwendung dieser schaltung bei halbleiterspeicherschaltungen.

Info

Publication number
DE3875319T2
DE3875319T2 DE8888402879T DE3875319T DE3875319T2 DE 3875319 T2 DE3875319 T2 DE 3875319T2 DE 8888402879 T DE8888402879 T DE 8888402879T DE 3875319 T DE3875319 T DE 3875319T DE 3875319 T2 DE3875319 T2 DE 3875319T2
Authority
DE
Germany
Prior art keywords
circuit
bipolar
application
semiconductor memory
memory circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888402879T
Other languages
English (en)
Other versions
DE3875319D1 (de
Inventor
Yasuhiko Maki
Osamu Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Publication of DE3875319D1 publication Critical patent/DE3875319D1/de
Application granted granted Critical
Publication of DE3875319T2 publication Critical patent/DE3875319T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/22—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0021—Modifications of threshold
    • H03K19/0027—Modifications of threshold in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09448—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Nonlinear Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE8888402879T 1987-11-16 1988-11-16 Logische schaltung mit bipolar- und cmos-halbleitern und anwendung dieser schaltung bei halbleiterspeicherschaltungen. Expired - Fee Related DE3875319T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62288730A JP2593894B2 (ja) 1987-11-16 1987-11-16 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE3875319D1 DE3875319D1 (de) 1992-11-19
DE3875319T2 true DE3875319T2 (de) 1993-02-25

Family

ID=17733943

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888402879T Expired - Fee Related DE3875319T2 (de) 1987-11-16 1988-11-16 Logische schaltung mit bipolar- und cmos-halbleitern und anwendung dieser schaltung bei halbleiterspeicherschaltungen.

Country Status (5)

Country Link
US (2) US4906868A (de)
EP (1) EP0317430B1 (de)
JP (1) JP2593894B2 (de)
KR (1) KR910009443B1 (de)
DE (1) DE3875319T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2593894B2 (ja) * 1987-11-16 1997-03-26 富士通株式会社 半導体記憶装置
JPH0239719A (ja) * 1988-07-29 1990-02-08 Fujitsu Ltd 半導体回路
JPH07120937B2 (ja) * 1988-11-08 1995-12-20 日本電気株式会社 インバータ回路
JPH02246151A (ja) * 1989-03-20 1990-10-01 Hitachi Ltd 抵抗手段と論理回路、入力回路、ヒューズ切断回路、駆動回路、電源回路、静電保護回路及びこれらを含む半導体記憶装置ならびにそのレイアウト方式及びテスト方式
EP0403075B1 (de) * 1989-05-15 1996-04-17 Texas Instruments Incorporated BICMOS-Hochleistungsschaltkreis mit voller Ausgangsspannungsschwingung
JPH02303216A (ja) * 1989-05-17 1990-12-17 Fujitsu Ltd 半導体集積回路
US5006736A (en) * 1989-06-13 1991-04-09 Motorola, Inc. Control circuit for rapid gate discharge
US4970414A (en) * 1989-07-07 1990-11-13 Silicon Connections Corporation TTL-level-output interface circuit
JP2546904B2 (ja) * 1990-01-31 1996-10-23 三菱電機株式会社 半導体論理回路
US5047980A (en) * 1990-08-17 1991-09-10 Unisys Corporation BiCMOS memory having memory cells connected directly to address decoders
JP2569986B2 (ja) * 1991-03-20 1997-01-08 富士通株式会社 半導体記憶装置
US5257226A (en) * 1991-12-17 1993-10-26 Sgs-Thomson Microelectronics, Inc. Integrated circuit with self-biased differential data lines
JP3193218B2 (ja) * 1993-12-21 2001-07-30 株式会社東芝 半導体論理回路
US5563543A (en) * 1994-12-14 1996-10-08 Philips Electronics North America Corporation Low-voltage BiCMOS digital delay chain suitable for operation over a wide power supply range
US5777510A (en) * 1996-02-21 1998-07-07 Integrated Device Technology, Inc. High voltage tolerable pull-up driver and method for operating same
US5933034A (en) * 1996-03-01 1999-08-03 Texas Instruments Incorporated High speed biCMOS gate driver for MOSFETs incorporating improved injection immunity
JP6993572B2 (ja) * 2018-01-25 2022-01-13 富士通株式会社 電子回路、半導体装置及びスイッチング電源装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60125015A (ja) * 1983-12-12 1985-07-04 Hitachi Ltd インバ−タ回路
JPH0616585B2 (ja) * 1983-12-16 1994-03-02 株式会社日立製作所 バツフア回路
JPS613390A (ja) * 1984-06-15 1986-01-09 Hitachi Ltd 記憶装置
EP0433271A3 (en) * 1985-07-22 1991-11-06 Hitachi, Ltd. Semiconductor device
JPS62221219A (ja) * 1986-03-22 1987-09-29 Toshiba Corp 論理回路
JPS6362411A (ja) * 1986-09-02 1988-03-18 Nec Corp 半導体回路
JP2585599B2 (ja) * 1987-06-05 1997-02-26 株式会社日立製作所 出力インタ−フエ−ス回路
JP2593894B2 (ja) * 1987-11-16 1997-03-26 富士通株式会社 半導体記憶装置

Also Published As

Publication number Publication date
KR890008837A (ko) 1989-07-12
EP0317430A3 (en) 1990-02-07
US4961170A (en) 1990-10-02
DE3875319D1 (de) 1992-11-19
EP0317430B1 (de) 1992-10-14
JP2593894B2 (ja) 1997-03-26
EP0317430A2 (de) 1989-05-24
JPH01130387A (ja) 1989-05-23
US4906868A (en) 1990-03-06
KR910009443B1 (ko) 1991-11-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee