DE68923017D1 - Bipolar- und CMOS-Transistoren verwendende integrierte Halbleiterschaltung. - Google Patents

Bipolar- und CMOS-Transistoren verwendende integrierte Halbleiterschaltung.

Info

Publication number
DE68923017D1
DE68923017D1 DE68923017T DE68923017T DE68923017D1 DE 68923017 D1 DE68923017 D1 DE 68923017D1 DE 68923017 T DE68923017 T DE 68923017T DE 68923017 T DE68923017 T DE 68923017T DE 68923017 D1 DE68923017 D1 DE 68923017D1
Authority
DE
Germany
Prior art keywords
bipolar
integrated circuit
semiconductor integrated
cmos transistors
cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68923017T
Other languages
English (en)
Other versions
DE68923017T2 (de
Inventor
Masahiro Iwamura
Kozaburo Kurita
Hideo Maejima
Tetsuo Nakano
Atsuo Hotta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE68923017D1 publication Critical patent/DE68923017D1/de
Application granted granted Critical
Publication of DE68923017T2 publication Critical patent/DE68923017T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/567—Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00307—Modifications for increasing the reliability for protection in bipolar transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09448—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
DE68923017T 1988-03-07 1989-03-03 Bipolar- und CMOS-Transistoren verwendende integrierte Halbleiterschaltung. Expired - Fee Related DE68923017T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63051494A JP2569113B2 (ja) 1988-03-07 1988-03-07 半導体集積回路装置

Publications (2)

Publication Number Publication Date
DE68923017D1 true DE68923017D1 (de) 1995-07-20
DE68923017T2 DE68923017T2 (de) 1995-10-26

Family

ID=12888524

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68923017T Expired - Fee Related DE68923017T2 (de) 1988-03-07 1989-03-03 Bipolar- und CMOS-Transistoren verwendende integrierte Halbleiterschaltung.

Country Status (5)

Country Link
US (1) US5047669A (de)
EP (1) EP0332077B1 (de)
JP (1) JP2569113B2 (de)
KR (1) KR0119471B1 (de)
DE (1) DE68923017T2 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02105622A (ja) * 1988-10-13 1990-04-18 Nec Corp 論理ゲート回路
JPH02214219A (ja) * 1989-02-14 1990-08-27 Nec Corp バイポーラｍｏｓ３値出力バッファ
JPH03231455A (ja) * 1990-02-07 1991-10-15 Toshiba Corp 半導体集積回路
US5055716A (en) * 1990-05-15 1991-10-08 Siarc Basic cell for bicmos gate array
US5446321A (en) * 1990-06-19 1995-08-29 Texas Instruments Incorporated BICMOS tri-state circuit with full output voltage swing
JP3095229B2 (ja) * 1990-08-31 2000-10-03 株式会社日立製作所 マイクロプロセッサ及び複合論理回路
US5107142A (en) * 1990-10-29 1992-04-21 Sun Microsystems, Inc. Apparatus for minimizing the reverse bias breakdown of emitter base junction of an output transistor in a tristate bicmos driver circuit
JP2570492B2 (ja) * 1990-11-28 1997-01-08 日本電気株式会社 半導体回路
US5153464A (en) * 1990-12-14 1992-10-06 Hewlett-Packard Company Bicmos tri-state output buffer
US5128562A (en) * 1990-12-19 1992-07-07 North American Philips Corporation, Signetics Division Memory element with high metastability-immunity
US5148056A (en) * 1991-03-27 1992-09-15 Mos Electronics Corp. Output buffer circuit
US5132567A (en) * 1991-04-18 1992-07-21 International Business Machines Corporation Low threshold BiCMOS circuit
JP3093380B2 (ja) * 1991-11-15 2000-10-03 株式会社東芝 半導体集積回路における信号出力回路
US5184034A (en) * 1991-12-06 1993-02-02 National Semiconductor Corporation State-dependent discharge path circuit
US5371423A (en) * 1992-12-14 1994-12-06 Siemens Aktiengesellschaft Tri-state-capable driver circuit
US5399918A (en) 1993-09-30 1995-03-21 Intel Corporation Large fan-in, dynamic, bicmos logic gate
US5721875A (en) * 1993-11-12 1998-02-24 Intel Corporation I/O transceiver having a pulsed latch receiver circuit
US5398000A (en) * 1994-03-30 1995-03-14 Intel Corporation Simple and high speed BICMOS tristate buffer circuit
JP3614210B2 (ja) * 1994-06-10 2005-01-26 アジレント・テクノロジーズ・インク トライステート・バッファ
US5438270A (en) * 1994-06-24 1995-08-01 National Semiconductor Corporation Low battery tester comparing load and no-load battery voltage
US5600261A (en) * 1994-10-05 1997-02-04 Cypress Semiconductor Corporation Output enable access for an output buffer
JP2002523956A (ja) * 1998-08-18 2002-07-30 インフィネオン テクノロジーズ エージー 駆動回路
TW461180B (en) * 1998-12-21 2001-10-21 Sony Corp Digital/analog converter circuit, level shift circuit, shift register utilizing level shift circuit, sampling latch circuit, latch circuit and liquid crystal display device incorporating the same
JP2010003388A (ja) 2008-06-23 2010-01-07 Elpida Memory Inc 半導体記憶装置およびそのテスト方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4029971A (en) * 1976-02-13 1977-06-14 Rca Corporation Tri-state logic circuit
JPH0693626B2 (ja) * 1983-07-25 1994-11-16 株式会社日立製作所 半導体集積回路装置
US4610001A (en) * 1983-10-03 1986-09-02 Honeywell Information Systems Inc. Write amplifier
JPS60177723A (ja) * 1984-02-24 1985-09-11 Hitachi Ltd 出力回路
JPH06103837B2 (ja) * 1985-03-29 1994-12-14 株式会社東芝 トライステ−ト形出力回路
US4612458A (en) * 1985-08-28 1986-09-16 Advanced Micro Devices, Inc. Merged PMOS/bipolar logic circuits
US4649294A (en) * 1986-01-13 1987-03-10 Motorola, Inc. BIMOS logic gate
JPS62254460A (ja) * 1986-04-26 1987-11-06 Toshiba Corp Ｂｉ−ＣＭＯＳ論理回路
US4682054A (en) * 1986-06-27 1987-07-21 Motorola, Inc. BICMOS driver with output voltage swing enhancement
US4703203A (en) * 1986-10-03 1987-10-27 Motorola, Inc. BICMOS logic having three state output
JPH0611111B2 (ja) * 1987-03-27 1994-02-09 株式会社東芝 ＢｉＭＯＳ論理回路
US4845385A (en) * 1988-06-21 1989-07-04 Silicon Connections Corporation BiCMOS logic circuits with reduced crowbar current

Also Published As

Publication number Publication date
EP0332077B1 (de) 1995-06-14
KR0119471B1 (ko) 1997-10-17
KR890015425A (ko) 1989-10-30
EP0332077A3 (de) 1991-04-24
US5047669A (en) 1991-09-10
JPH01226215A (ja) 1989-09-08
EP0332077A2 (de) 1989-09-13
JP2569113B2 (ja) 1997-01-08
DE68923017T2 (de) 1995-10-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee