DE3581842D1 - Integrierte halbleiterschaltung mit komplementaeren feldeffekttransistoren. - Google Patents

Integrierte halbleiterschaltung mit komplementaeren feldeffekttransistoren.

Info

Publication number
DE3581842D1
DE3581842D1 DE8585107845T DE3581842T DE3581842D1 DE 3581842 D1 DE3581842 D1 DE 3581842D1 DE 8585107845 T DE8585107845 T DE 8585107845T DE 3581842 T DE3581842 T DE 3581842T DE 3581842 D1 DE3581842 D1 DE 3581842D1
Authority
DE
Germany
Prior art keywords
field effect
effect transistors
semiconductor circuit
integrated semiconductor
complementary field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585107845T
Other languages
English (en)
Inventor
Ryuichi Hashishita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3581842D1 publication Critical patent/DE3581842D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE8585107845T 1984-06-26 1985-06-25 Integrierte halbleiterschaltung mit komplementaeren feldeffekttransistoren. Expired - Lifetime DE3581842D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59131474A JPS6110269A (ja) 1984-06-26 1984-06-26 半導体集積回路

Publications (1)

Publication Number Publication Date
DE3581842D1 true DE3581842D1 (de) 1991-04-04

Family

ID=15058814

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585107845T Expired - Lifetime DE3581842D1 (de) 1984-06-26 1985-06-25 Integrierte halbleiterschaltung mit komplementaeren feldeffekttransistoren.

Country Status (4)

Country Link
US (1) US4716450A (de)
EP (1) EP0166423B1 (de)
JP (1) JPS6110269A (de)
DE (1) DE3581842D1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH056034Y2 (de) * 1986-04-16 1993-02-17
JPH0822492B2 (ja) * 1986-12-26 1996-03-06 松下電器産業株式会社 プリント基板保管箱搬送方法
US5410173A (en) * 1991-01-28 1995-04-25 Kikushima; Ken'ichi Semiconductor integrated circuit device
JPH04340252A (ja) * 1990-07-27 1992-11-26 Mitsubishi Electric Corp 半導体集積回路装置及びセルの配置配線方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3599010A (en) * 1967-11-13 1971-08-10 Texas Instruments Inc High speed, low power, dynamic shift register with synchronous logic gates
US4035826A (en) * 1976-02-23 1977-07-12 Rca Corporation Reduction of parasitic bipolar effects in integrated circuits employing insulated gate field effect transistors via the use of low resistance substrate contacts extending through source region
JPS5526680A (en) * 1978-08-16 1980-02-26 Mitsubishi Electric Corp Semiconductor integrated circuit
JPS5591162A (en) * 1978-12-27 1980-07-10 Fujitsu Ltd Semiconductor device
JPS55115353A (en) * 1979-02-27 1980-09-05 Fujitsu Ltd Cell rotatable by 90
JPS56157056A (en) * 1980-05-09 1981-12-04 Fujitsu Ltd Manufacture of read-only memory
JPS5843568A (ja) * 1981-09-09 1983-03-14 Nec Corp 相補型絶縁ゲ−ト電界効果半導体メモリ装置
JPS5864047A (ja) * 1981-10-13 1983-04-16 Nec Corp マスタ−スライス半導体集積回路装置
JPS5864046A (ja) * 1981-10-13 1983-04-16 Nec Corp マスタ−スライス半導体集積回路装置
JPS5897847A (ja) * 1981-12-08 1983-06-10 Nec Corp 集積回路装置
JPS58139446A (ja) * 1982-02-15 1983-08-18 Nec Corp 半導体集積回路装置
US4511914A (en) * 1982-07-01 1985-04-16 Motorola, Inc. Power bus routing for providing noise isolation in gate arrays
EP0120089A4 (de) * 1982-09-30 1985-06-10 Storage Technology Partners Selbsttätig regelbares chipentwurfsverfahren.
JPS5963754A (ja) * 1982-10-04 1984-04-11 Toshiba Corp 半導体装置
DE3238311A1 (de) * 1982-10-15 1984-04-19 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung in gate-array-technik
US4568961A (en) * 1983-03-11 1986-02-04 Rca Corporation Variable geometry automated universal array

Also Published As

Publication number Publication date
EP0166423A3 (en) 1986-11-26
EP0166423A2 (de) 1986-01-02
JPH0352225B2 (de) 1991-08-09
US4716450A (en) 1987-12-29
EP0166423B1 (de) 1991-02-27
JPS6110269A (ja) 1986-01-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP