DE3869519D1 - Halbleiterschichtstruktur mit einer aluminium-silizium-legierungsschicht. - Google Patents

Halbleiterschichtstruktur mit einer aluminium-silizium-legierungsschicht.

Info

Publication number
DE3869519D1
DE3869519D1 DE8888402162T DE3869519T DE3869519D1 DE 3869519 D1 DE3869519 D1 DE 3869519D1 DE 8888402162 T DE8888402162 T DE 8888402162T DE 3869519 T DE3869519 T DE 3869519T DE 3869519 D1 DE3869519 D1 DE 3869519D1
Authority
DE
Germany
Prior art keywords
aluminum
silicon alloy
semiconductor layer
layer structure
alloy layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888402162T
Other languages
English (en)
Inventor
Kiyoshi Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3869519D1 publication Critical patent/DE3869519D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/47Schottky barrier electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
DE8888402162T 1987-08-28 1988-08-25 Halbleiterschichtstruktur mit einer aluminium-silizium-legierungsschicht. Expired - Fee Related DE3869519D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21283787 1987-08-28

Publications (1)

Publication Number Publication Date
DE3869519D1 true DE3869519D1 (de) 1992-04-30

Family

ID=16629169

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888402162T Expired - Fee Related DE3869519D1 (de) 1987-08-28 1988-08-25 Halbleiterschichtstruktur mit einer aluminium-silizium-legierungsschicht.

Country Status (4)

Country Link
US (1) US4987562A (de)
EP (1) EP0305296B1 (de)
KR (1) KR890004401A (de)
DE (1) DE3869519D1 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2680468B2 (ja) * 1989-07-01 1997-11-19 株式会社東芝 半導体装置および半導体装置の製造方法
JPH07109829B2 (ja) * 1989-11-20 1995-11-22 三菱電機株式会社 半導体装置の製造方法
JPH0430516A (ja) * 1990-05-28 1992-02-03 Canon Inc 半導体装置及びその製造方法
US5268329A (en) * 1990-05-31 1993-12-07 At&T Bell Laboratories Method of fabricating an integrated circuit interconnection
JP2598335B2 (ja) * 1990-08-28 1997-04-09 三菱電機株式会社 半導体集積回路装置の配線接続構造およびその製造方法
TW520072U (en) * 1991-07-08 2003-02-01 Samsung Electronics Co Ltd A semiconductor device having a multi-layer metal contact
JP3401843B2 (ja) * 1993-06-21 2003-04-28 ソニー株式会社 半導体装置における多層配線の形成方法
JPH0730095A (ja) * 1993-06-25 1995-01-31 Mitsubishi Electric Corp 半導体装置及びその製造方法
US5561083A (en) * 1994-12-29 1996-10-01 Lucent Technologies Inc. Method of making multilayered Al-alloy structure for metal conductors
KR970052186A (ko) * 1995-12-04 1997-07-29 김주용 반도체 소자 제조 방법
US6025264A (en) * 1998-02-09 2000-02-15 United Microelectronics Corp. Fabricating method of a barrier layer
US6121126A (en) * 1998-02-25 2000-09-19 Micron Technologies, Inc. Methods and structures for metal interconnections in integrated circuits
US6815303B2 (en) * 1998-04-29 2004-11-09 Micron Technology, Inc. Bipolar transistors with low-resistance emitter contacts
JP4653493B2 (ja) * 2002-12-23 2011-03-16 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 電子装置及びその用途
US7531380B2 (en) * 2003-04-30 2009-05-12 Cree, Inc. Methods of forming light-emitting devices having an active region with electrical contacts coupled to opposing surfaces thereof
JP2006024829A (ja) * 2004-07-09 2006-01-26 Toshiba Corp 半導体装置及びその製造方法
WO2011004469A1 (ja) * 2009-07-08 2011-01-13 トヨタ自動車株式会社 半導体装置とその製造方法
JP6269276B2 (ja) * 2014-04-11 2018-01-31 豊田合成株式会社 半導体装置、半導体装置の製造方法
JP6897141B2 (ja) * 2017-02-15 2021-06-30 株式会社デンソー 半導体装置とその製造方法
JP7027066B2 (ja) * 2017-08-24 2022-03-01 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5149767A (ja) * 1974-10-28 1976-04-30 Nissin Electric Co Ltd Isokei
US4316209A (en) * 1979-08-31 1982-02-16 International Business Machines Corporation Metal/silicon contact and methods of fabrication thereof
JPS58103168A (ja) * 1981-12-16 1983-06-20 Fujitsu Ltd 半導体装置
JPS59124765A (ja) * 1982-12-29 1984-07-18 Fujitsu Ltd 半導体装置
JPS59175763A (ja) * 1983-03-25 1984-10-04 Fujitsu Ltd 半導体装置
JPS6020568A (ja) * 1983-07-15 1985-02-01 Hitachi Ltd 半導体装置
JPS60187042A (ja) * 1984-03-06 1985-09-24 Seiko Epson Corp 半導体装置

Also Published As

Publication number Publication date
US4987562A (en) 1991-01-22
EP0305296A1 (de) 1989-03-01
EP0305296B1 (de) 1992-03-25
KR890004401A (ko) 1989-04-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee